Getac 9270D Service Manual page 114

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4.9 Power Management Interface Signals –Table 4
Name
SYS_RESET#
RSMRST#
LAN_RST#
LAN_PHY_PW
R_CTRL /
GPIO12
Type
System Reset: This pin forces an internal reset after being
debounced. The Ibex Peak will reset immediately if the SMBus
I
is idle; otherwise, it will wait up to 25 ms ± 2 ms for the
SMBus to idle before forcing a reset on the system.
Resume Well Reset: This signal is used for resetting the
resume power plane logic. This signal must be asserted for at
I
least 10 ms after the suspend power wells are valid. When
deasserted, this signal is an indication that the suspend power
wells are stable.
LAN Reset: When asserted, the internal LAN controller is in
reset. This signal must remain asserted until at least 1 ms after
the LAN power well (VccLAN) and ME power well
(VccME3_3) are valid. Also, LAN_RST# must assert a
minimum of 40 ns before the LAN power rails become
I
inactive. When deasserted, this signal is an indication that
LAN power wells are stable. Note:
1. If Intel LAN is enabled LAN_RST# must be connected to
the same source as MEPWROK.
2. If Intel LAN is not used or disabled LAN_RST# must be
grounded through an external pull-down resistor.
LAN PHY Power Control: LAN_PHY_PWR_CTRL should
be connected to LAN_DISABLE_N on the Hanksville PHY.
Ibex Peak will drive LAN_PHY_PWR_CTRL low to put the
O
PHY into a low power state when functionality is not needed.
NOTES: LAN_PHY_PWR_CTRL can only be driven low if
SLP_LAN# is deasserted. Signal can instead be used as
GPIO12.
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