Getac 9270D Service Manual page 129

4.21 Clock Interface Signals –Table 2
Name
CLKIN_DOT96P,
CLKIN_DOT96N
XTAL25_IN
XTAL25_OUT
REFCLK14IN
CLKOUT_PEG_A_P,
CLKOUT_PEG_A_N
CLKOUT_PEG_B_P,
CLKOUT_PEG_B_N
PEG_A_CLKRQ# /
GPIO47,
PEG_B_CLKRQ# /
GPIO56
CLKOUT_PCIE[7:0]
P,
CLKOUT_PCIE[7:0]
N
Type
I 96MHz differential reference clock from a clock chip.
I Connection for 25MHz crystal to Ibex Peak oscillator circuit.
O Connection for 25MHz crystal to Ibex Peak oscillator circuit.
Single-ended 14.31818MHz reference clock driven by a clock
I
chip.
100MHz Gen2 specification differential output to PCI-Express
O
Graphics device
100MHz Gen2 specification differential output to a second
O
PCI-Express Graphics device
Clock Request Signals for PEG SLOTS Can instead by used as
I
GPIOs
100MHz PCIe* Gen1.1 specification differential output to PCI
O
Express* devices
Description