Mipi Csi-2 (Camera); Table 22 X1 Pinout Description - Congatec conga-PA5 Pico-ITX SBC User Manual

5.8

MIPI CSI-2 (Camera)

The conga-PA5 provides a camera interface on connector X1. The interface supports up to two independent cameras – four data lanes for the
first camera and two data lanes for the second camera. Each lane operates at up to 1 GT/s depending on the camera resolution. The interfaces
follow the MIPI Alliance CSI-2 specification and support up to 24 MP image capture @ 15 fps, full HD 1080p60, YUV420, YUV422, RGB444,
RGB555, RGB565, RGB888, JPEG and RAW 8/10/12/14.
The table below shows the conga-PA5 MIPI CSI-2 pinout description. The pinout and voltage levels comply with the SGET Camera Feature
Specification.
Table 22 X1 Pinout Description
Pin Signal
1 CAM_PWR
2 CAM_PWR
3 CAM0_CSI_D0+
4 CAM0_CSI_D0-
5 GND
6 CAM0_CSI_D1+
7 CAM0_CSI_D1-
8 GND
9 CAM0_CSI_D2+
10 CAM0_CSI_D2-
11 CAM0_RST#
12 CAM0_CSI_D3+
13 CAM0_CSI_D3-
14 GND
15 CAM0_CSI_CLK+
16 CAM0_CSI_CLK-
17 GND
18 CAM0_I2C_CLK
19 CAM0_I2C_DAT
20 CAM0_ENA#
21 MCLK
22 CAM1_ENA#
23 CAM1_I2C_CLK
Copyright © 2017 congatec GmbH
Description
3.3V +/- 5% supply voltage to power the camera device
3.3V +/- 5% supply voltage to power the camera device
CSI2 Camera 0 Data Lane 0+
CSI2 Camera 0 Data Lane 0-
CSI2 Camera 0 Data Lane 1+
CSI2 Camera 0 Data Lane 1-
CSI2 Camera 0 Data Lane 2+
CSI2 Camera 0 Data Lane 2-
Camera 0 Reset (low active)
CSI2 Camera 0 Data Lane 3+
CSI2 Camera 0 Data Lane 3-
CSI2 Camera 0 Differential Clock+ (Strobe)
CSI2 Camera 0 Differential Clock- (Strobe)
Camera 0 Control Interface, CLK
Camera 0 Control Interface, DATA
Camera 0 Enable (low active)
Master Clock. May be used to drive camera's internal PLL (19.2MHz or 25MHz)
Camera 1 Enable (low active)
Camera 1 Control Interface, CLK
PA50m112
X1
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