Measurement Computing Data Translation DT3010 Series User Manual page 105

Chapter 6
This chapter describes the analog input, analog output, digital I/O, counter/timer, and
synchronous features of the DT3010 Series boards. To frame the discussions, refer to the block
diagram shown in
Ext A/D Clock
Ext A/D TTL Trig
Ext D/A Clock
Ext D/A TTL Trig
Analog Trigger
20 MHz Clock
Ext Analog Trigger
Analog In
Ch. Sel
Gain Sel
A/D Clk
DIO Ports
Input Sel
104
Figure 55. Note that bold entries indicate signals you can access.
Trigger/Clock
Logic
A/D Counter,
24-bits
D/A Counter
24-bit
TScan Counter
24-bit
32 Channel Mux
Gain Amp
(1, 2, 4, 8)
12- or 16-bit ADC**
MUX
Tristate Buffers
Compare
1 kSample
Input FIFO
Analog Trigger
PCI Bus Interface
PCI Bus
*The DT3010, DT3010-268, and DT3016 have a 4 kSample output FIFO; the
DT3010/32 and DT3010/32-268 have a 32 kSample output FIFO.**Only the
DT3016 has a 16-bit ADC and 16-bit DACs.
Figure 55: Block Diagram of the DT3010 Series Boards
A/D Trig
A/D Clk
A/D Trig
A/D Clk
1 K Entry
CGL FIFO
D/A Clk
Output FIFO*
12- or 16-bit
12- or 16-bit
D/A Clk
8-bit
Bidirectional
DAC
8-bit Latch
Bidirectional
8-bit Latch
4 User
20
Counter/
MHz Timers,
Clk 16-bit ea.
A/D Trig Out
Buffer
A/D Clk Out
CGL Reg.
Channel
Ch. Sel
Parameter
Gain Sel
Reg.
Input Sel
Output FIFO
Counter
Analog Out 1
DAC**
Analog Out 0
DAC**
DIO Bank B
[7:0]
DIO Bank A
[7:0]
User Clk [3:0]
User Gate [3:0]
User Out [3:0]