5.3.5 Pairing setting.................................................................................................................................... 5-15

5.4 Supplementary Settings........................................................................................................................... 5-16

5.5 Control Station Return Setting................................................................................................................. 5-19

5.6 Station Inherent Parameters (High Performance model QCPU, Process CPU, Redundant CPU,

and Universal model QCPU)................................................................................................................... 5-20

5.7 Refresh Parameters................................................................................................................................. 5-24

5.7.1 Concept of the link refreshing ........................................................................................................... 5-27

5.7.2 How to set the refresh parameters ................................................................................................... 5-29

5.8 Valid Module During Other Station Access............................................................................................. 5-38

5.9 Standby Station Compatible Module (High Performance model QCPU and Process CPU)................ 5-39

5.10 Writing the Parameters to the CPU....................................................................................................... 5-41

6 PROGRAMMING

6.1 Programming Precautions ....................................................................................................................... 6- 1

6.1.1 Interlock related signals .................................................................................................................... 6- 1

6.1.2 Program example .............................................................................................................................. 6- 4

6.2 Cyclic Transmission ................................................................................................................................. 6- 5

6.2.1 32-bit data guarantee ........................................................................................................................ 6- 5

6.2.2 Block guarantee of cyclic data per station........................................................................................ 6- 7

6.2.3 Interlock program example ............................................................................................................... 6- 8

6.3 Link Dedicated Instruction List................................................................................................................. 6- 9

6.4 Using the Link Special Relays (SB)/Link Special Registers (SW) ......................................................... 6-13

7 APPLICATION FUNCTIONS

7.1 Direct Access to the Link Devices ........................................................................................................... 7- 2

7.2 Inter-Link Data Transfer Function (High Performance model QCPU, Process CPU,

Redundant CPU, and Universal model QCPU)...................................................................................... 7- 6

7.3 Low-Speed Cyclic Transmission Function (High Performance model QCPU, Process CPU,

Redundant CPU, and Universal model QCPU)...................................................................................... 7- 9

7.3.1 Send range settings .......................................................................................................................... 7-10

7.3.2 Send timing........................................................................................................................................ 7-11

7.3.3 Startup ............................................................................................................................................... 7-14

7.4 Transient Transmission Function (Non-Periodical Communication)...................................................... 7-16

7.4.1 Communication function.................................................................................................................... 7-17

7.4.2 Routing function................................................................................................................................. 7-20

7.4.3 Group function ................................................................................................................................... 7-27

7.4.4 Message sending function using the logical channel numbers ....................................................... 7-28

7.4.5 Programming ..................................................................................................................................... 7-30

7.4.5 (1) Data sending/receiving (JP/GP.SEND, JP/GP.RECV) .............................................................. 7-34

7.4.5 (2) Reading from/writing to word devices of other stations (JP/GP.READ, JP/GP.SREAD,

JP/GP.WRITE, JP/GP.SWRITE)..................................................................................................... 7-50

7.4.5 (3) Requesting transient transmission to other stations (J(P)/G(P).REQ) ...................................... 7-67

7.4.5 (4) Reading/writing word devices of other stations (J(P).ZNRD, J(P).ZNWR)................................ 7-76

7.4.5 (5) Remote RUN/Remote STOP (Z(P).RRUN, Z(P).RSTOP)......................................................... 7-84

7.4.5 (6) Reading and writing clock data of other station CPU modules (Z(P).RTMRD, Z(P).RTMWR)

.......................................................................................................................................................... 7-92

A - 8

6- 1 to 6-31

7- 1 to 7-151

A - 8

Table of Contents