Xilinx Artix-7 FPGA AC701 Getting Started Manual page 32

Advanced Bring-up with Base Targeted Reference Design
Table 5: Control and Monitoring Interface Components
Callout Component
1 Led Indicator
2 Test Option
3 Packet size
4 Test start/stop control
5 DMA statistics
6 PCIe Transmit (writes in Gb/s)
7 PCIe Receive (reads in Gb/s)
8 Message log
9 Performance plots
10 Close button
11 PCIe Endpoint Status
12 Host System's Initial Credits
13 Block diagram button
14 Power statistics
15 Temperature
Notes:
1. Items 2 through 5 are duplicated for each of the two datapaths.
32
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Component Description
Indicates DDR3 calibration information; Green on calibration, red
otherwise
Options to select Loopback, HW Generator, or HW checker
Packet size for the test run with allowed packet size shown as a tool tip
Button to control the start and end of the test
• Throughput (Gb/s): DMA payload throughput in gigabits per
second for transmit and receive controllers
• DMA Active Time (ns): The time in nanoseconds that the DMA
controller has been active in the last second
• DMA Wait Time (ns): The time in nanosecond that the DMA
controller waited for the software to provide more descriptors
• BD Errors: Indicates a count of buffer descriptors (BD) that caused a
DMA error as indicated by the error status field in the descriptor
update
• BD Short Errors: Indicates a short error in the buffer descriptors in
the transmit direction when the entire buffer specified by length in
the descriptor could not be fetched (Not applicable to the receive
direction)
• SW BDs: Indicates the total count of buffer descriptors set up in the
descriptor ring
Reports transmitted (endpoint card to host) throughput as obtained
from the PCIe endpoint hardware performance monitor
Reports received (host to endpoint card) throughput as obtained from
the PCIe endpoint hardware performance monitor
Text box showing informational messages, warnings, or errors
Click this tab to plot the PCIe transactions on the AXI4-Stream interface
and show the payload statistics graph based on the DMA controller
performance monitor
Click this button to close the GUI
Reports the contents of various PCIe endpoint configuration fields as
reported in the endpoint configuration space
Initial flow control credits advertised by the host system after link
training with the endpoint (A value of zero implies infinite flow control
credits)
Click this button to show a case block diagram of each mode currently
running
Power in Watt plotted for the VCCINT, GTVCC, VCCAUX, and
VCCBRAM rails
Monitors the current die temperature
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UG967 (v4.0.1) March 05, 2014