Xilinx Artix-7 FPGA AC701 Getting Started Manual page 13

Evaluation kit (vivado design suite 2013.3)
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4.
X-Ref Target - Figure 8
5.
6.
X-Ref Target - Figure 9
AC701 Getting Started Guide
UG967 (v4.0.1) March 05, 2014
Select Setup > Serial Port... and ensure that the settings match those shown in
Figure
8:
Baud rate: 9600
Data: 8 bit
Parity: none
Stop: 1 bit
Flow control: none
In Vivado Design Suite, open a Tcl shell and type:
source C:/ac701_bist/ready_for_download/bist_download.tcl
Select the desired tests to run and observe the test results (see
www.xilinx.com
Basic Hardware Bring-up with Built-In Self-Test
Figure 8: Serial Port Setup
Figure 9: BIST Main Menu
UG967_08_111412
Figure
9).
UG967_09_111412
13
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