Xilinx Artix-7 FPGA AC701 Getting Started Manual page 20

Advanced Bring-up with Base Targeted Reference Design
memory as multiple FIFOs. Additionally, the design provides power monitoring capability
based on a PicoBlaze™ embedded processor.
For software, the design provides 32-bit Linux drivers targeting the Fedora 16 platform
and a graphical user interface (GUI) which controls the tests and monitors the status.
Features
Base Features
This section lists the features of the Targeted Reference Design.
•
•
•
Application Features
•
Test Setup Requirements
The prerequisites for testing the design in hardware are
•
•
•
•
•
20
Send Feedback
PCI Express v2.1 compliant x4 endpoint operating at 5Gb/s/lane/direction
• PCIe transaction interface utilization monitor
• MSI & Legacy interrupt support
Bus Mastering Scatter-gather DMA
• Multichannel DMA
• AXI4-Stream interface for data
• AXI4 interface for register space access
• DMA performance monitor
• Full duplex operation
Independent transmit and receive channels
-
Virtual FIFO layer over DDR3 memory
• Provides 4 channel design (4 FIFOs in DDR3 SODIMM)
PicoBlaze processor-based PVT Monitoring
• Built-in hardware to monitor power by reading the TI UCD90120A power
controller chip included on the AC701 evaluation board
• Built-in hardware to monitor die temperature by way of a Xilinx
Analog-to-Digital Converter
AC701 evaluation board with XC7A200T FPGA
Design consisting of:
• Design source files
• Device driver files
• FPGA programming files
• Documentation
Vivado Design Edition
Type-A to micro-B USB cable
Fedora 16 LiveDVD
www.xilinx.com AC701 Getting Started Guide
UG967 (v4.0.1) March 05, 2014