4.4
Local Bus Controller Chip Select Assignments
The following table shows local bus controller (LBC) bank and chip select assignments for
the MVME4100 board.
Table 4-3
LBC Bank / Chip
Select
0
1
2
3
4
5
6
7
NOTES:
1. Flash bank size determined by VPD flash packet.
2. Control/Status registers are byte read and write capable.
3. 32-bit timer registers are byte readable, but must be written as 32 bits.
4. MRAM is byte read and write capable.
MVME4100 Single Board Computer Programmer's Reference (6806800H19D)
LBC Chip Select Assignments
Local Bus Function
Boot flash bank
Boot flash bank
NAND flash bank
MRAM
Control/status registers
Quad UART
32-bit Timers
Not Used
Programming Details
Size
Data Bus Width Notes
128 MB
32 bits
128 MB
32 bits
64 KB
8 bits
512 KB
16 bits
64 KB
32 bits
64 KB
8 bits
64 KB
32 bits
-
-
1
1
-
4
2
-
3
-
55
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