Nand Flash Chip 1 Control Register; Table 3-11 Pci Bus 3 Status Register - SMART Embedded Computing MVME4100 Programmer's Reference Manual

Register Descriptions
Table 3-11
REG
BIT
Field
OPER
RESET
PCI_3_SPD
PCIX_3
PCI_3_64B
RSVD
3.1.9

NAND Flash Chip 1 Control Register

The MVME4100 provides a Control Register for the NAND Flash device.
Table 3-12
REG
BIT
Field
OPER
RESET
34
PCI Bus 3 Status Register
PCI Bus 3 Status Register - 0xF200 000A
7 6 5
RSVD RSVD RSVD
R R R
0 0 0
PCI Bus 3 Speed. Indicates the frequency of PCI bus 3.
00: 33 MHz
01: 66 MHz
10: 100 MHz
11: 133 MHz
PCI-X Bus 3. A set condition indicates that bus 3 is operating in PCI-X mode.
Cleared indicates PCI mode.
PCI Bus 3 64-bit. A set condition indicates that bus 3 is enabled to operate in 64-
bit mode. Cleared indicates 32-bit mode.
Reserved for future implementation.
NAND Flash Chip 1 Control Register
NAND Flash Chip 1 Control Register - 0xF200 0010
7 6 5
CLE ALE WP
R/W
0 0 1
MVME4100 Single Board Computer Programmer's Reference (6806800H19D)
4 3
RSVD PCI_3_64B
R R
0 0
4 3 2
RSVD RSVD RSVD
R
0 0 0
Register Descriptions
2 1 0
PCIX_3 PCI_3_SPD
R R R
0 0 0
1 0
RSVD RSVD
0 0