SMART Embedded Computing MVME4100 Programmer's Reference Manual page 50

Programming Details
Table 4-1
MPC8548E
Signal
TSEC1_TCD[3:1
]
TSEC2_TXD[0],
TSEC2_TXD[7]
TSEC2_TXD[1,
TSEC2_RX_ER]
50
MPC8548E POR Configuration Settings (continued)
Default
Select
POR
Option
Setting
Fixed 111
Fixed 10
Fixed 11
MVME4100 Single Board Computer Programmer's Reference (6806800H19D)
Description State of Bit vs. Function
I/O port 000
selection
001
010
011
100
101
110
111
TSEC2 00
protocol
configuration
01
10
11
DDR DRAM 00
type
01
10
11
Programming Details
Reserved
Reserved
Reserved
Serial Rapid IO x4
(2.5 Gbps); PCI Express x4
Serial Rapid IO x4
(1.25 Gbps); PCI Express x4
Serial Rapid IO x4
(3.125 Gbps)
Serial Rapid IO x4
(1.25 Gbps)
PCI Express x8
TSEC2 controller uses 16-bit
FIFO mode (8-bit FIFO mode
if TSEC2 configured in
reduced mode
TSEC2 controller uses MII
protocol (RMII if TSEC2
configured in reduced mode)
TSEC2 controller uses GMII
protocol (RGMII if TSEC2
configured in reduced mode)
TSEC2 controller uses TBI
protocol (RTBI if TSEC2
configured in reduced mode)
Reserved
DDR1
Reserved
DDR2