Programming Details
4.12.4
LBC Timing Parameters
The following table defines the timing parameters for the devices on the local bus.
Table 4-11
LBCTLD
CSNT
ACS
XACS
SCY
SETA
TRLX
EHTR
EAD
4.12.5
USB Oscillator Configuration
Software must configure the USB chip for the correct clock input of 48MHz.
4.13
Clock Distribution
The clock function generates and distributes all of the clocks required for system operation.
The PCI-E clocks are generated using a four output differential clock driver. The PCI/PCI-
X bus clocks are generated using a MPC9855 clock generator. Additional clocks required
by individual devices are generated near the devices using individual oscillators. The
following table lists the clocks required on the MVME4100 along with their frequency and
source.
Table 4-12
Device
MPC8548E
MPC8548E
62
LBC Timing Parameters
0
1
NOR
NOR
Flash
Flash
0
0
1
1
0
0
0
0
4
4
0
0
0
0
0
0
0
0
Clock Assignments
Clock Signal
CLK_CPU
CLK125MHZ
MVME4100 Single Board Computer Programmer's Reference (6806800H19D)
2
3
NAND
MRAM
Flash
0
0
1
1
0
0
0
0
2
1
0
0
1
1
0
0
0
0
Frequency
Clock Tree
(MHz)
Source
66
Oscillator
125
Oscillator
Programming Details
4
5
6
CSR
UART
Timers
0
0
0
0
1
0
0
0
0
0
0
0
5
3
5
0
0
0
0
0
0
0
0
0
0
0
0
Qty
VIO
1
+3.3 V
1
+2.5 V
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