SMART Embedded Computing MVME4100 Programmer's Reference Manual page 48

Programming Details
Table 4-1
MPC8548E
Signal
PCI1_REQ64_L
PCI2_GNT3_L
PCI1_GNT1_L
PCI1_GNT2_L
PCI1_GNT3_L
PCI1_GNT4_L
EC_MDC
48
MPC8548E POR Configuration Settings
Default
Select
POR
Option
Setting
Fixed 0
Resistor 0
Resistor 0
Fixed 1
Fixed 1
PLD 0
Fixed 0
MVME4100 Single Board Computer Programmer's Reference (6806800H19D)
Description State of Bit vs. Function
PCI1-32 0
Configuration
1
PCI1_CLK 0
1
PCI1 interface 0
I/O impedance
1
PCI arbiter 0
configuration
1
PCI debug 0
configuration
1
PCI/PCI-X 0
configuration
1
TSEC 1 and 2 0
width
configuration
1
Programming Details
PCI1/PCI-X interface is 64-bit
PCI1/PCI-X interface is 32-bit
PCI1_CLK is used as the
PCI1 clock
SYSCLK is used as the PCI
clock
25 Ohm drivers
42 Ohm drivers
Disable on-chip PCI/PCI-X
arbiter
Enable on-chip PCI/PCI-X
arbiter
PCI debug enabled
PCI operates in normal mode
PCI-X mode
PCI mode
TSEC 1 and 2 in reduced
mode (RTBI or RGMII)
TSEC 1 and 2 in standard
mode (TBI or GMII)