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3.1.16
NAND Flash Chip 2 Status Register
The MVME4100 provides a Status Register for the NAND Flash device.
Table 3-19
REG
BIT
Field
OPER
RESET
RB4
RB3
RB2
RB1
RSVD
3.1.17 Watch Dog Timer Load Register
The MVME4100 provides a watch dog timer load register.
Table 3-20 Watch Dog Timer Load Register
REG
BIT
Field
OPER
RESET
LOAD
MVME4100 Single Board Computer Programmer's Reference (6806800H19D)
NAND Flash Chip 2 Status Register
NAND Flash Chip 2 Status Register - 0xF200 001D
7
6
5
RB1
RB2
RB3
R
1
1
1
Ready/Busy 4. If cleared, Device 4 is busy. If set, device 4 is ready.
Ready/Busy 3. If cleared, Device 3 is busy. If set, device 3 is ready.
Ready/Busy 2. If cleared, Device 2 is busy. If set, device 2 is ready.
Ready/Busy 1. If cleared, Device 1 is busy. If set, device 1 is ready.
Reserved for future implementation.
Watch Dog Timer Control Register - 0xF200 0020
7
6
Load
R/W
0
0
Counter Load. When the pattern 0xDB is written the watch dog counter will be loaded
with the count value.
4
3
RB4
RSVD
1
0
5
4
3
0
0
0
Register Descriptions
2
1
0
RSVD
RSVD
RSVD
0
0
0
]
2
1
0
0
0
0
39
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