Supported Pci Bus Commands - Xilinx LogiCore PLB PCI Full Bridge Specification

PLB PCI Full Bridge (v1.00a)
Table 3: PLB PCI Bridge Parameters-Port Dependencies (Contd)
Generic
G62 C_NUM_IDSEL
C_BRIDGE_IDSEL_ADDR
G63
_BIT
G64 C_PLB_MID_WIDTH
G65 C_PLB_NUM_MASTERS
G66 C_PLB_AWIDTH
G67 C_PLB_DWIDTH
G68 C_FAMILY

Supported PCI Bus Commands

The list of commands supported by the LogiCORE PCI interface is provided in
Table 4: Supported PCI Bus Commands
Code
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
22
Parameter
Command
Name
Interrupt Acknowledge
Special Cycle
I/O Read
I/O Write
Reserved
Reserved
Memory Read
Memory Write
Reserved
Reserved
Configuration Read
Configuration Write
Memory Read Multiple
Affects Depends
If G61=0, G62 has no meaning. If
G61=1, G62 sets the number of devices
supported in configuration operations.
G49 and G61 and Must be sufficiently large to include the
G63 G63 address bit defined by G63. If G49=1,
G62 restricts the allowed values that are
meaningful in the Device Number
Register
If G61=0 or G49=1, G63 has no
G49, G61 meaning. If G61=1 and G49=0, G63
G62
and G62 must be consistent with the setting of
G62
IPIF Parameters Group
If G68 ≠ Virtex-4, G50-52 have no
G50-52
meanings.
Target
No
No
No
No
Ignore
Ignore
Yes
Yes
Ignore
Ignore
Yes
Yes
Yes
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Description
Table 4.
PLB PCI Bridge
Initiator
No
No
Yes
Yes
Ignore
Ignore
Yes
Yes
Ignore
Ignore
Optional
Optional
Yes
DS508 March 21, 2006
Product Specification