Vmechip Gcsr As Viewed From The Vmebus - Motorola MVME147 Installation And Use Manual

Table 3-7. VMEchip GCSR as Viewed from the VMEbus
VMEbus Interrupt Acknowledge Map
The VMEbus distinguishes interrupt acknowledge cycles from
other cycles by activating the IACK* signal line. It also specifies the
level that is being acknowledged using A03-A01. The VMEchip
monitors these lines and after receiving IACKIN*, it responds by
asserting IACKOUT* if it was not generating an interrupt at the
acknowledged level, or by returning a status/ID vector if it was.
The MVME147 may handle a VMEbus interrupt generated by its
own VMEchip.
LCSR Short I/O Address
Register Bits
$0 $0000-000F
$1 $0010-001F
$2 $0020-002F
$3 $0030-003F
$4 $0040-004F
$5 $0050-005F
$6 $0060-006F
$7 $0070-007F
$8 $0080-008F
$9 $0090-009F
$A $00A0-00AF
$B $00B0-00BF
$C $00C0-00CF
$D $00D0-00DF
$E $00E0-00EF
$F Does not respond
of GCSR
Memory Maps
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