Motorola MVME147 Installation And Use Manual page 90

Programming
Master Configuration Register
ADDRESS
FFFE2005 DDTACK 020 MASWP CFILL MASUAT MASA16 MASA24 MASD16
4
Bit 0
Bit 1
Bit 2
4-40
BIT 7 BIT 6 BIT 5
R/W R/W R/W
Setting the MASD16 bit forces the MVME147 to perform only
D8 and D16 data transfers on the VMEbus. Clearing the
MASD16 bit allows D8, D16, and D32 transfer capability on the
VMEbus when the MC68030 accesses in the range below
$F0000000. (Accesses to VMEbus locations above $F0000000 are
always restricted to D8/D16 regardless of the MASD16 bit.)
This bit is cleared by SYSRESET.
If either the MASA24 bit is set, or the MC68030 accesses the
VMEbus in the range below $1000000, the master drives one of
the standard (24-bit) address modiÞer codes during VMEbus
cycles (unless the master is conÞgured to use the master address
modiÞer register as described in the Master Address Modifier
Register section in this chapter). The specific standard AM code
is determined from the levels that the MC68030 drives on the
three function code lines during the cycle, as shown in the table
below. This bit is cleared by SYSRESET.
If either the MASA16 bit is set, or the MC68030 accesses the
VMEbus in the range above $FFFF0000, a short (16-bit) AM
code is used regardless of the state of the MASA24 bit (unless
the master is conÞgured to use the master address modiÞer
register as described in the Master Address Modifier Register
section in this chapter). The speciÞc short AM code is
determined from the levels that the MC68030 drives on the
three function code lines during the cycle, as shown in the
following table. This bit is cleared by SYSRESET.
BIT 4 BIT 3 BIT 2
R/W R/W R/W
BIT 1 BIT 0
R/W R/W