Motorola MVME147 Installation And Use Manual page 89

Bit 4 The RWD bit allows software to conÞgure the requester release
mode. When the bit is set, if RNEVER and DWB are both
cleared to 0, the requester releases the VMEbus after the
MC68030 completes a VMEbus cycle. When the bit is cleared, if
RNEVER and DWB are both cleared to 0, the requester operates
in the Release-On-Request (ROR) mode. After acquiring control
of the VMEbus, it maintains control until it detects another
request pending on the VMEbus. This bit is cleared by any reset.
Bit 5 The RONR bit controls the manner in which the VMEchip
requests the VMEbus. When the bit is set; anytime the
MVME147 has bus mastership, then gives it up, the VMEchip
does not request the VMEbus again until it detects the bus
request signal BR*, on its level, negated for at least 150 ns.
When the VMEchip detects BR* negated, it refrains from
driving it again for at least 200 ns.
This bit is cleared by any reset.
Bit 6 The DHB status bit is 1 when the MVME147 is VMEbus master
and 0 when it is not.
Bit 7 Setting the DWB control bit to 1 causes the VMEchip to request
the VMEbus (if not already bus master). When VMEbus
mastership has been obtained, it is not relinquished until after
the DWB and RNEVER bits are both cleared. This bit is cleared
by any reset.
Programming the VMEchip
4
4-39