Motorola MVME147 Installation And Use Manual page 87

System Controller Configuration Register
ADDRESS BIT 7 BIT 6 BIT 5 BIT 4
FFFE2001
Note
Bit 0
Bit 1
Bit 2
Bit 3
ROBIN
These bits are not affected by reset.
The SCON status bit is a reßection of the conÞguration of
header J3. When J3 pins 1 and 2 are connected, enabling the
MVME147 to act as the VMEbus system controller, then SCON
= 1. When J3 pins 1 and 2 are not connected, the MVME147 is
not the VMEbus system controller and SCON = 0.
This bit allows the software to initiate a global reset sequence.
Setting the SRESET bit activates the SYSRESET* signal on the
VMEbus which in turn resets the MVME147. This bit clears
automatically after the reset is complete. This bit is cleared by
any reset.
Setting BRDFAIL to 1 causes the VMEchip to attempt to activate
the SYSFAIL* signal on the VMEbus. The GCSR bit Inhibit
SYSFAIL (ISF), in global register 1, enables the MVME147 to
cause SYSFAIL* to be activated as a result of the state of
BRDFAIL. In addition, when the bit is set, the FAIL LED is lit. (A
watchdog time-out from the PCC also lights the FAIL LED.)
This bit is set by any reset.
The ROBIN bit conÞgures the VMEbus arbitration mode.
ROBIN = 1 forces the round-robin mode. ROBIN = 0 forces the
priority mode. Both modes can be used by the MVME147. This
bit is cleared by SYSRESET.
Programming the VMEchip
BIT 3 BIT 2
BRDFAIL SRESET
R/W R/W
BIT 1 BIT 0
SCON
W R
4-37
4