Motorola MVME147 Installation And Use Manual page 109

Mpu vmemodule
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Programming the GCSR
There are eight GCSR registers as shown in Table 4-10. The
VMEbus address is in the supervisor short I/O map.
Table 4-10. VMEchip Global Control and Status Register
MVME147
VMEbus
Address
Address
FFFE2021
00x1
FFFE2023
00x3
FFFE2025
00x5
FFFE2027
00x7
FFFE2029
00x9
FFFE202B
00xB
FFFE202D
00xD
FFFE202F
00xF
Note
The x denotes the value in the GCSR base address configuration register bits 0-3.
Note
Bit 7
Bit 6
Bit 5
LM3
LM2
LM1
R&H
SCON
ISF
BRDID7 BRDID6 BRDID5 BRDID4
General Purpose Control and Status Register 0
General Purpose Control and Status Register 1
General Purpose Control and Status Register 2
General Purpose Control and Status Register 3
General Purpose Control and Status Register 4
The bottom two lines in the table for each of the
following GCSR register definitions defines the
operations possible on the register bits, from the
MC68030 and the VMEbus, as follows:
R
This bit is a read-only status bit.
R/W
This bit is readable and writable.
C
Writing a 1 to this bit clears it. This bit reads 0.
R/C
This bit is readable. Writing a 1 to this bit clears it.
This bit is readable. Writing a 1 to this bit sets it; it
R/S
cannot be cleared.
Programming the VMEchip
Register
Bit 4
Bit 3
Bit 2
LM0
CHIPID3 CHIPID2 CHIPID1 CHIPID0 Global 0
BRDFAIL
BRDID3
BRDID2
Name
Bit 1
Bit 0
SIGHP
SIGLP
Global 1
BRDID1
BRDID0
Board ID
4-59
4

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