Motorola MVME147 Installation And Use Manual page 125

General Control Chip (GCC)
The GCC is a CMOS ASIC designed to replace 16 PALs and 19 other
devices on the previous MVME147 single board computers. It
provides the interface between the MC68030, VMEchip, PCC,
LANCE, and DRAM on the MVME147. While preserving the
original function of the MVME147, the GCC lowers part and
manufacture cost and reduces power consumption.
The GCC includes the following features:
SCSI Reset
Because the WD33C93 does not implement SCSI bus Reset (RST),
the GCC has separate signals to sense and drive it.
Local DRAM controller:
Ð Control signals to DRAM array
Ð MPU to DRAM interface
Ð PCC to DRAM interface
Ð LANCE to DRAM interface
Ð VMEchip to DRAM interface
Ð Local bus map decoder for MPU and PCC to DRAM
Ð Refresh controller
Ð Byte parity generator/checker
External selectable internal/external local bus arbiter
MC68030 to MC68882 interface logic
Local bus BERR* generation from parity and other errors
Support for WAITRMC function
MC68030 to VMEbus map decoder
Other miscellaneous control logic: CIIN*, SCIRST*,
ASYNCH*
General Control Chip (GCC)
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