Pentium Register (32 bit)
12
34
56
78
Notice that the internal data storage scheme for the PCI (Intel) bus is different from that
of the VME (Motorola) bus. For example, the byte 78 (the least significant byte) is
stored at location M on the PCI machine while the byte 78 is stored at the location M+3
on the VMEbus machine. Therefore, the data bus connections between the architectures
must be mapped correctly.
Address
78
M
56
M+1
34
M+2
12
M+3
XVME-653/658
Figure 4-2 Address-Invariant Translation
Chapter 4 – Programming
VMEbus
12
34
12
34
56
78
VMEbus
56
78
4-13
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