Register 233H - Watchdog Timer Port; Register 234H - Nvram And Diskonchip Port - Xycom XVME-653 Manual

XVME-653/658 Manual
Register 233h – Watchdog Timer Port
This register controls watchdog timer operation.
Bit
0
1
2
3
4
5
6
7
Register 234h – NVRAM and DiskOnChip Port
This register controls access to either the NVRAM or the DiskOnChip (DOC) compo-
nent. Bits 7 and 8 also control the byte swapping on XVME-653/658 modules that are
equipped with byte-swapping hardware. In XVME-653/30x modules without byte-
swapping hardware, bits 7 and 8 are RESERVED.
Bit
0 Control ROM/RAM15
1 Control ROM/RAM16
2 Control ROM/RAM17
3 DOC enable
4 Range select 0
5 Range select 1
6 SWAPS
7 SWAPM
The following ranges are defined by bits 4 and 5 in register 234h.
2-6
Table 2-10 Watchdog Timer Port Register Settings
Signal
RESERVED Reserved
RESERVED Reserved
RESERVED Reserved
RESERVED Reserved
WDOG_EN Enables the watchdog timer
MRESET_EN Timeout generates reset when asserted
WDOG_STS Watchdog timer status bit
WDOG_CLR Clears the watchdog timer
Table 2-11 NVRAM and DiskOnChip Port Register Settings
Signal
ROM address 15 - page control bit
ROM address 16 - page control bit
ROM address 17 - page control bit
Enables DOC mode
1 = No swapping (data invariant) occurs during Slave cycles
(This byte can only be set for byte-swapping modules.)
1 = No swapping (data invariant) occurs during Master cycles
(This byte can only be set for byte-swapping modules.)
Table 2-12 Register 234h Defined Ranges
Range Select Bits
00
01
10
11
Result
Result
Range
No range
CC000-CFFFF
D0000-D7FFF
D8000-DFFFF