Block Diagram - IET Labs, Inc. RLC Digibridge 1693 User And Service Manual

Table of Contents

Advertisement

tor. The values obtained during "ZERO" calibration
are stored in Digibridge memory and retained during
power-down and power up.
The impedance of each internal standard resistor is
similarly stored in memory for use by the micropro-
cessor in the calculation of parameters being mea-
sured. (For this purpose, the Digibridge measures its
own internal standard resistors against an external
standard during factory calibration - and recalibra-
tion, if any.) Therefore, the impedances of the internal
resistance standards are known at the calibration
frequency (usually 1 kHz), and are computed by the
microprocessor for other test frequencies.
The Digibridge also stores the frequency error of
its crystal-referenced oscillator (actual vs nominal
frequency, expressed in parts per million) so that the
microprocessor uses a corrected frequency value in
each calculation of capacitance or inductance from
measured impedance. This frequency correction is
programmed into the Digibridge during factory cali-
bration - and recalibration, if any.
The microprocessor controls the measurement
sequence, according to programs in the read-only
memory, using stored operator selections that are
made available through keyboard control or (if you
have the interface option) by remote-control com-
mand. Selections include for example - parameters:
R and Q, Land Q, C and D, or C and R; test voltage:
.005 to 1.275 V; equivalent circuit: series or parallel;
test rate: SLOW, MEDIUM:, or FAST; frequency:
Theory
programmable from 12 Hz to 200 kHz in 504 steps;
delay: up to 99999 ms; and averaging: 2 to 255 mea-
surements; etc.
The instrument normally autoranges to find the cor-
rect range; but operation can be restricted to any of
the four ranges (1, 2, 3,4), under keyboard control.
Each range is 4 octaves wide (16:1), with reduced-
accuracy extensions both above and below. Leading
zeroes before the decimal point are blanked out of
the RLC and QDR displays.
4.1.3  Block Diagram
The block diagram shows the microprocessor in the
upper center connected by data and address buses
to digital circuitry including memories (RAM and
ROM) and peripheral interface adaptors (PIAs).
Analog circuitry is shown in the lower part of the
diagram, where Zx is supplied with a test signal at
frequency f from a sine-wave generator, driven by a
crystal-controlled digital frequency divider circuit.
The P/I signal selector and instrumentation amplifier
supply an analog signal that represents 2 impedances
alternately: the appropriate internal resistance stan-
dard, Rs, and the DUT, Zx.
The phase-sensitive (dual-slope) detector and mea-
surement counters convert this analog signal into
digital form. See circuit descriptions below.
From this information and criteria selected by the
keyboard (or remote control) , the microprocessor
calculates the RLC and QDR values for display,
averaging, bin assignments, etc.
1693 RLC Digibridge
105

Advertisement

Table of Contents
loading

Related Products for IET Labs, Inc. RLC Digibridge 1693

Table of Contents