Spi Decoding (Option) - Rigol MSO5000-E Series User Manual

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related to the value of the horizontal timebase) is dispalyed.

SPI Decoding (Option)

SPI bus is based on the master-slave configuration and usually consists of chip select
line (CS), clock line (SCLK), and data line (SDA). Wherein, the data lines include the
master input/slave output (MISO) data line and master output/slave input (MOSI)
data line. The oscilloscope samples the channel data on the rising or falling edge of
the clock signal (if the source is an analog channel, the oscilloscope will also judge
each data point (logic "1" or logic "0") according to the preset threshold level).
SCLK
MOSI
Master
MISO
CS
In the decode setting menu, press Decode1 → Bus Type, then rotate the
multifunction knob
press Bus Type continuously or enable the touch screen to select it.
1． Enable or disable the bus
11-18
The detected ACK is 1
Slave
Figure 11-7 SPI Serial Bus
to select "SPI". Press down the knob to select it. You can also
Chapter 11 Protocol Decoding
SCLK
SDA
(MISO/MOSI)
MSO5000-E User Guide