Huawei OceanStor Dorado V3 Series Parts Replacement page 216

OceanStor Dorado V3 Series
Parts Replacement
Bit error
Bit error rate
Boundary scan
Browser/Server
C
Cache hit ratio
Captive screw
Challenge Handshake
Authentication Protocol
Coffer
Coffer disk
Controller
Controller enclosure
Issue 05 (2019-01-30)
An incompatibility between a bit in a transmitted digital
signal and the corresponding bit in the received digital
signal.
The probability that a transmitted bit will be erroneously
received. The bit error rate (BER) is measured by counting
the number of bits in error at the output of a receiver and
dividing by the total number of bits in the transmission.
BER is typically expressed as a negative power of 10.
A test methodology that uses shift registers in the output
connections of integrated circuits (ICs). One IC is often
connected to the next IC. A data pattern is passed through
the chain and the observed returned data stream affected by
the circuit conditions gives an indication of any faults
present. The system is defined under IEEE standard 1149.1
and is also known as Joint Test Action Group (JTAG).
Architecture that defines the roles of the browser and server.
The browser is the service request party and the server is the
service provider.
The ratio of the number of cache hits to the number of all
I/Os during a read task, usually expressed as a percentage.
Specially designed to lock into place on a parent or
motherboard, allowing for easy installation and removal of
attached pieces without release of the screw.
A password-based authentication protocol that uses a
challenge to verify that a user has access rights to a system.
A hash of the supplied password with the challenge is sent
for comparison so the cleartext password is never sent over
the connection.
A technology for ensuring data security and integrity in a
storage system. It is used to store the mission-critical data of
the system.
Disks that build up the coffer.
The control logic in a disk or tape that performs command
decoding and execution, host data transfer, serialization and
deserialization of data, error detection and correction, and
overall management of device operations. The control logic
in a storage subsystem that performs command
transformation and routing, aggregation (RAID, mirroring,
striping, or other), high-level error recovery, and
performance optimization for multiple storage devices.
An enclosure that accommodates controllers and provides
storage services. It is the core component of a storage
system and generally consists of components, such as
controllers, power supplies, and fans.
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8 Glossary
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