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Chapter 1: ML501 Evaluation Platform
31. Configuration Address and Mode DIP Switches
The 8-position DIP switch (SW15) sets the address and mode of configuration. It also
enables fallback configuration of the Platform Flash PROM and enables System ACE
configuration.
Table 1-14: Configuration Address DIP Switch Settings
Notes:
1. Reserved for future use. Not currently implemented.
Configuration Address [2:0] allows the user to select among multiple configuration
images. For System ACE configuration, up to eight possible configurations can be stored
on a CF card. The Platform Flash PROM and Linear Flash can hold up to four separate
bitstreams that can be chosen by Configuration Address [2:0].
Mode[2:0] selects the FPGA configuration mode according to
Table 1-15: Configuration Mode DIP Switch Settings
32. Encryption Key Battery
An onboard rechargeable lithium battery is connected to the V
hold the encryption key for the FPGA.
32
Table 1-14
lists the function of each switch.
Switch (SW15)
1
Config Address [2].
2
Config Address [1].
3
Config Address [0].
4
MODE [2].
5
MODE [1].
6
MODE [0].
7
Platform Flash PROM Fallback (On = Enable, Off = Disable).
System ACE Configuration (On = Enable, Off = Disable). When enabled,
8
the System ACE controller configures the FPGA from the CF card
whenever a card is inserted or the SYSACE RESET button is pressed.
Mode[2:0]
000
Master Serial (Platform Flash PROM, up to four configurations)
001
SPI (One configuration)
010
BPI Up (Parallel NOR Flash, up to four configurations)
011
BPI Down (Parallel NOR Flash, up to four configurations)
100
Master SelectMAP (Platform Flash PROM, up to four configurations)
101
JTAG (PC4, System ACE up to eight configurations)
110
Slave SelectMAP (Platform Flash PROM, up to four configurations)
111
Slave Serial (Platform Flash PROM, up to four configurations)
www.xilinx.com
Function
Table
1-15.
Mode
pin of the FPGA to
BATT
ML501 Evaluation Platform
UG226 (v1.3) November 10, 2008
R
(1)
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