Xilinx ML50 Series User Manual page 41

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References
Documents supporting Virtex-5 FPGAs:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Documents specific to the ML501 Evaluation Platform:
10. UG228, ML501 Getting Started Tutorial.
11. UG227, ML501 Reference Design User Guide.
The Xilinx
Memory Interface Generator (MIG) tool:
12. WP260, Memory Interfaces Made Easy with Xilinx FPGAs and the Memory Interface Generator.
13. UG086, Xilinx Memory Interface Generator (MIG) User Guide (for registered users).
14.
15.
ML501 Evaluation Platform
UG226 (v1.3) November 10, 2008
DS100, Virtex-5 FPGA Family Overview.
DS202, Virtex-5 FPGA Data Sheet: DC and Switching Characteristics.
UG190, Virtex-5 FPGA User Guide.
UG194, Virtex-5 FPGA Tri-Mode Ethernet Media Access Controller User Guide.
UG197, Virtex-5 FPGA Integrated Endpoint Block User Guide for PCI Express Designs.
UG193, XtremeDSP Design Considerations.
UG191, Virtex-5 FPGA Configuration User Guide.
UG192, Virtex-5 FPGA System Monitor User Guide.
UG195, Virtex-5 FPGA Packaging and Pinout Specification.
Memory Solutions Web page
Demos on Demand, Memory Interface Solutions with Xilinx FPGAs.
Xilinx Support - Memory Interface Resources
www.xilinx.com
Appendix B
offers the following material supporting the
(for registered users).
41