Tektronix AWG5200 Series Technical Reference page 7

Arbitrary waveform generators, specifications and performance verification
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List of Tables
Table 1: Run mode .................................................................................................
Table 2: Arbitrary waveform ......................................................................................
Table 3: Real time digital signal processing .....................................................................
Table 4: Sequencer .................................................................................................
Table 5: Sample clock generator..................................................................................
Table 6: Analog output skew......................................................................................
Table 7: Signal output characteristics ............................................................................
Table 8: Harmonic distortion (DC High BW output path) ....................................................
Table 9: Harmonic distortion (AC Direct output path) ........................................................
Table 10: Harmonic distortion (AC Amplified output path) ..................................................
Table 11: SFDR operating at 2.5 GS/s ..........................................................................
Table 12: SFDR operating at 5 GS/s ............................................................................
Table 13: SFDR operating at 10 GS/s ...........................................................................
Table 14: Phase noise operating at 2.5 GS/s....................................................................
Table 15: Phase noise at 5.0 GS/s or 10 GS/s with DDR enabled ...........................................
Table 16: Marker outputs .........................................................................................
Table 17: 10 MHz Ref Out (reference output) .................................................................
Table 18: Ref In (reference input) ...............................................................................
Table 19: Clock Out...............................................................................................
Table 20: Clock In.................................................................................................
Table 21: Sync In ..................................................................................................
Table 22: Sync Out ................................................................................................
Table 23: Sync Clock Out ........................................................................................
Table 24: Trigger Inputs ..........................................................................................
Table 25: Pattern Jump In connector ............................................................................
Table 26: Auxiliary Outputs (Flags).............................................................................
Table 27: Computer system ......................................................................................
Table 28: Display ..................................................................................................
Table 29: Power supply ...........................................................................................
Table 30: Mechanical characteristics............................................................................
Table 31: Environmental characteristics ........................................................................
Table 32: Required equipment for the functional test .........................................................
Table 33: Required equipment for performance tests .........................................................
Table 34: Analog amplitude accuracy (DC High BW output path) ..........................................
Table 35: Offset accuracy ........................................................................................
Table 36: Analog DC bias accuracy .............................................................................
Table 37: Marker high level accuracy...........................................................................
Table 38: Marker low level accuracy............................................................................
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