Hitachi AP1 Data Book page 91

--------------------------------------------------------HMCS46C,HMCS46CL
The I-bit latches are attached to these terminals. Each ter-
minal is addressed by the Y register. The
Do
to
D3
terminals are
also addressed directly by the operand of input/output instruc-
tion. Refer to INPUT/OUTPUT for additional information.
• ROM
• ROM Address Space
ROM is used as a memory for the instructions and the pat-
terns (constants). The instruction used in the HMCS46C consists
of 10 bits. These 10 bits are called "a word", which is a unit
for writing into ROM.
The ROM address
has
been split into two banks.
Each bank is composed of32 pages (64 words/page) .
The ROM capacity is 4,096 words (1 word
=
10 bits) in all.
All addresses can contain both the instructions and the pat-
terns (constants).
The ROM address space is shown in Figure I.
1 - - - - -
64 words----i
1FOF _ 3 E 3 F
·Subroutine Space
1
1o
.""
(1 Page)
I
1\(
I
I
I
I
I
I
I
I
I
,
(30 Page)
(31 Page)
(32 Page)
(33 Page)
I
I
I
I
I
I
I
I
(61 Page)
(62 Page)
E
(63 Page)
·Bank 0 0 Page (0 Page) is the Subroutine Space.
Timer/Counter Interrupt Address
Bank 0 0 Page 3F Address
(0 Page 3F Address)
Input Interrupt Address
Bank 0 1 Page 3F Address
(1 Page 3F Address)
Reset Address
Bank 1 31 Page 3F Address
(63 Page 3F Address)
Note: The parenthesized contents are expressions of the Page, combining
the bank part with the page part.
Figure 1
ROM
Address Space
89