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--------------------------------------------------------------HD614P080S
Table 12. Timer Mode Register B
TMB
Bit 3
Auto-reload Function
o
No
Yes
TMB
Prescaler Divide Ratio,
Bit
2
Bit 1
Bit 0
Clock Input Source
0
0
0
72048
0
0
1
512
0
1
0
128
0
1
1
32
1
0
0
8
1
0
1
4
1
1
0
2
1
1
1
INTI (External Event Input)
• TIMER-B (TCBl: $OOA, TCBU: $OOB)
TlRl: $OOA, TlRU: $OOB
T1MER-B consists of an 8-bit write-only Timer Load Regis-
ter, and an 8-bit read-only Timer/Event Counter. Each of them
has a low-order digit (TCBL: $OOA, TLRL: $OOA) and a high-
order digit (TCBU: $OOB, TLRU: $OOB).
The Timer/Event Counter can be initialized by writing data
into the Timer Load Register. In this case, write the low-order
digit first, and then the high-order digit. The Timer/Event
Counter is initialized at the time when the high-order digit is
written. The Timer Load Register will be initialized to $00 by
the MCU reset.
The counter value of T1MER-B can be obtained by reading
PMR:$ 004
the Timer/Event Counter. In this case, read the high-order digit
first, and then the low-order digit. The count value oflow-order
digit is latched at the time when the high-order digit is read.
• TIMER-A Interrupt Request Flag (lFTA:
$001,2)
The TIMER-A Interrupt Request Flag is set by the overflow
output of TIMER-A.
• TIMER-A Interrupt Mask (lMTA:
$001,3)
TIMER-A Interrupt Mask prevents an interrupt request
generated by T1MER-A Interrupt Request Flag.
Table 13. TIMER-A Interrupt Request Flag
TIMER-A Interrupt
Request Flag
o
Interrupt Request
No
Yes
Table 14. TIMER-A Interrupt Mask
TIMER-A Interrupt
Mask
o
Interrupt Request
Enable
Disable (Mask)
• TIMER-B Interrupt Request Flag (lFTB:
$002,0)
The TIMER-B Interrupt Request Flag is set by the overflow
output of TIMER-B.
• TIMER-B Interrupt Mask (lMTB:
$002, 1)
TIMER-B Interrupt Mask prevents an interrupt request
generated by T1MER-B Interrupt Request Flag.
SMR:$ 005
Transfer clock selection
R.o/SCK pin mode selection
' - - - - - - - R.
2
/S0
pin mode selection
L -_ _ _ _ _ _ _
R.,/SI pin mode selection
L-_ _ _ _ _ _ _ _ _ _
R.
2
/INT
o
pin mode selection
' - - - - - - - - - - - - - - Rll/lNT, pin mode selection
TMA:$ 008
TMB:$009
I><ITMA21TMA 11™AOI
· '
l'
L
TlMER-B input clock selection
f
l
Auto-reload function selection
~
TlMER-A mput clock selection
Fig. 14 Mode Register Configuration and Function
277
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