Hitachi AP1 Data Book page 173

4-bit single-chip microcomputer
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Group
Mnemonic code
Function
Status
MNEI
i
M ="t i
NZ
YN E I
i
Y ="t i
NZ
ANEM
A="tM
NZ
Compare
BNEM
B ="t M
NZ
ALE I
i
A ~ i
NB
ALEM
A~M
NB
BLEM
B~M
NB
SEM
n
1
-+
M (n)
RAM bit
REM
n
a
-+
M (n)
Manipulation
TM
n
Test M (n)
M (n)
BR
a
Branch on Status 1
1
CAL
a
Subroutine Jump on Status 1
1
ROM
LPU
u
Load Program Counter Upper on
Address
Status 1
TBR
p
Table Branch
RTN
Return from Subroutine
S E I E
1
-+
I/E
S ElF a
1
-+
I Fa
SEIF1
1
-+
IF 1
SETF
1
-+
T F
SECF
1
-+
C F
REI E
a
-+
I/E
REI Fa
a
-+
I Fa
REI F 1
a
-+
IF 1
RETF
a
-+
T F
Interrupt
RECF
a
-+
C F
Tla
Test
I N To
INTo
T 11
Test
I NT.
INT.
T I Fa
Test
IFa
I Fo
TIF1
Test
IF 1
I F.
TTF
Test
TF
TF
LTI
i
-+
Timer/Counter
LTA
A
-+
Timer/Counter
LAT
Timer/Counter
-+
A
RTN I
Return Interrupt
SED
1
-+
0
(Y)
RED
a
-+
0
(Y)
TO
Test
D(Y)
O(Y)
SEDO
n
1
-+
0
(n)
Input/Output
REDO
n
a
-+
0
(n)
(Display Control)
LAR
p
R (p)
-+
A
LBR
p
R (p)
-+
B
LRA
p
A
-+
R (p)
LRB
p
B
-+
R (p)
Pp
Pattern Generation
NOP
No Operation
171

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