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H D 6 1 4 P 0 8 0 S - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
1000.0
lIE
r-------------1-----
Sequence Control
. Push PCtCA/ST
1003.0
·Re ..
t
Ilf
. Jump
10
Vector
Address
Priority PLA
Fig. 6 Interrupt Circuit Block Diagram
Table 1. Vector Addresses and Interrupt Priority
Reset. Interrupt
Priority
Vector addresses
RESET
-
$0000
INlo
1
$0002
INTI
2
$0004
TIMER-A
3
$0006
TIMER-B
4
$0008
SERIAL
5
$OOOC
Table 2. Conditions of Interrupt Service
Vector
Addr.ss
~
Interrupt
source
INTo
INTI
TIMER-A
TIMER-B
control bits
I/E
1
1
1
1
IFO·IMO
1
0
0
0
IF1 ·IM1
•
1
0
0
IFTA ·IMTA
•
•
1
0
IFTB ·IMTB
•
•
•
1
IFS ·IMS
•
•
•
•
270
SERIAL
1
0
0
0
0
1
• Don't care
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