Block Multiplexer Channels - IBM 4381 Manual

For byte multiplexer channel data rates when there is activity on other channels,
see IBM 4381 Processor Channel Characteristics, GA24-3948.
I/
0
devices in the support processor subsystem attach to byte multiplexer channel
0 via the local channel adapter, which occupies the last control unit position on this
channel. Thus, a maximum of seven external control units can be attached to byte
multiplexer channel 0 in a uniprocessor.
The local channel adapter operates like a channel-to-channel adapter that connects
the
1/0
bus of the support processor to channel 0. The local channel adapter
provides a low-cost method of attaching support processor subsystem devices to
byte multiplexer channel 0.
The local channel adapter appears as a shared control unit that can have multiple
device addresses. It operates in multibyte mode in the 4381 Processor. Data is
transferred from the local channel adapter to the byte multiplexer channel two
bytes at a time.
Block Multiplexer Channels
The block multiplexer channels in a 4381 Processor can operate in block
multiplexer or selector mode. When operating in selector mode of block
multiplexer mode, a block multiplexer channel in a 4381 Processor is functionally
equivalent to a selector or block multiplexer channel in System/370, 30XX, and
other 4300 processors. A block multiplexer channel presents a standard
1/0
interface and can have a maximum of eight control units attached.
The table below shows the maximum individual block multiplexer channel data rate
for each permissible channel in each uniprocessor 4381 configuration as well as the
maximum aggregate data rate of each channel group and the 4381 system. All
figures are Mb/sec.
Standard Optional
Block Maximum Block Maximum
4381 Multiplexer Aggregate Multiplexer Aggregate Maximum
Model Channels Standard Channels Optional Aggregate
Group
12345
Group 6789AB Group System
11 33332 14 2 2 1 1 1 1 8 22
12 33332 14
3 3 1 1 1 1 10 24
13 3 3 3 3 2 14 333331 16 30
1 3 3 3 3 2 14
2 2 1 1 1 1
8 22
2 3 3 3 3 2 14 2 2 1 1 1 1 8 22
Like a byte multiplexer, a block multiplexer channel can have multiple subchannels,
each of which can support one
I/
0 operation. The setting of a channel mode bit
(O) in control register 0 determines whether the addressed subchannel of a block
multiplexer channel operates in block multiplexer mode (assuming it is capable of
operating in block multiplexer mode) or selector mode when a start instruction is
issued. The mode bit is set to 0 (selector mode) at IPL and can be altered by
programming at any time.
Section 20: 4381 Processor Uniprocessor Model Groups
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