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provided instead of the segment protection facility. Page protection can be
used to prevent any writing in protected 4K pages of virtual storage.
A VM/370 hardware assist function (ECPS:VM/370) and an MVS hardware
assist facility (ECPS:MVS) are standard in 4381 Processors. ECPS:VM/370
and ECPS:MVS can be used concurrently to improve performance when
MVS/SP Version 1 executes in a virtual machine under the control of
VM/370 with the VM/System Product.
ECPS:VM/370 consists of the Virtual Machine Assist, Control Program
Assist, Expanded Virtual Machine Assist, Virtual Interval Timer Assist, and
Shadow-Table Bypass Assist components.
It
can be used only when
System/370 mode is in effect.
ECPS:MVS consists of 13 privileged instructions and the page fault assist
function, all of which are operative during System/370 mode operations. Six
of the 13 instructions are operative for System/370-XA mode operations. The
standard Virtual Machine Extended Facility Assist enables the ECPS:MVS
instructions to be executed directly by an MVS virtual machine to improve
performance.
Preferred Machine Assist (not provided for 4341 Processors) is standard in
4381 Processors and can be used only during System/370 mode operations.
It
is designed to improve the performance of MVS/SP Version 1 running in a
preferred virtual machine.
Instruction retry is standard to attempt to correct errors that occur during
instruction execution without programming assistance. For certain hardware
facilities (reloadable control storage, channel buffers, and the high-speed
buffer and its swap buffer), the instruction retry facility provides automatic
hardware reconfiguration to assign spare storage when a retry does not correct
an error. The reconfiguration facility permits continued system operation,
without performance degradation in some cases. Maintenance is performed
when reconfiguration is no longer possible.
The following are significant storage features of 4381 Processors.
All storage in a 4381 Processor-processor, control, high-speed buffer, and
local-is implemented using monolithic technology. The technology used for
processor storage in 4381 Processors provides much denser storage chips (64K
bits per chip as in 4341 Processors and a 256K-bit chip for processor storage
above 16Mb) than is used in System/370, 303X, or 308X processors (2K, 4K,
or 16K bits per chip).
A two-level storage system is implemented, consisting of large processor
storage used as backing storage for a smaller high-speed buffer storage. The
instruction processing function works mostly with the high-speed buffer so that
the effective processor storage cycle is a fraction of the actual processor
storage cycle.
4K bytes for a 4381 Model Group 11, 32K bytes for a 4381 Model Group 12,
and 64K bytes for a Model Group 13 of high-speed buffer storage (where
K= 1024) are standard. The full buffer size is used when the page size in
effect is 4K bytes. When page size is 2K bytes in a 4381 Model Group 11 or
12, only half of the high-speed buffer is used. A doubleword of data is fetched
Section 01 : Highlights
7
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