IBM 4381 Manual page 116

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A check-stop state is defined for the 4381 Processor. If a check-stop condition
occurs when a 4381 Processor is set to normal mode for machine checks, a logout
to functional diskette 1 occurs, after which the 43 81 Processor stops without the
occurrence of a logout to the fixed area in processor storage (locations 0 to 511).
Check-stop is initiated by hardware rather than by programming. Implementation
of a check-stop state prevents system operations from continuing when the nature
of the machine malfunction prevents the processor from presenting meaningful
status data.
The check-stop function is controlled by a check-stop control bit as in System/370
processors. When a 4381 Processor enters the check-stop state, the start key and
restart function are made inoperative. Processor operation can be resumed only
after a system reset or IPL is performed.
The following conditions cause a check-stop for a 4381 Processor when it is in
normal mode for machine check conditions:
Certain clocking checks, such as a refresh clock check
Second unretryable error occurs while the first is being processed
When hard-stop mode is in effect, after any type of machine check is detected, the
4381 Processor enters the machine check state immediately without any retry or
reference code generation. There is no logout to functional diskette 1 and no
machine check interruption and logout to appropriate fields in processor storage
locations 0 to 511 before the stop. The suppressed log is kept until the 4381
Processor is started again, at which time the logouts to functional diskette 1 and
processor storage occur.
When a 43 81 Processor is set to operate in no-retry mode, logging to functional
diskette 1 is done but the instruction retry function is inhibited and an instruction
processing damage or system damage machine check is generated after the error is
logged. When disable mode is in effect, the processor is prevented from entering
the check-stop state and taking any machine check interruptions. When a machine
check condition occurs with disable mode in effect, the processor attempts to
continue operation without a logout to functional diskette 1 or a machine check
interruption.
The stop after log mode is provided for use with System/360 operating systems.
When this mode is in effect, retry occurs after an error but system operation stops
after a logout to functional diskette 1 occurs to prevent erroneous continued
operation because of instructions or data overlayed by the logout to processor
storage.
The state of a 4381 Processor for machine check interruptions after IPL or an
initial CPU reset is:
1. External damage interruptions and check-stops are enabled.
2. Recovery, interval timer, timing facilities, degradation, and channel status
interruptions are disabled.
3. PSW bit 13 normally is set to one by the IPL PSW (it is set to zero by the IPL
system reset procedure) to enable the processor for system damage, instruction
processing damage, and channel subsystem damage interruptions.
Section 60: Reliability, Availability, and Serviceability (RAS)
107