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streaming mode. The Speed Matching Buffer for 3380 feature can be installed on
the storage director but the data rate supported is still 3 Mb/sec. Operation of
3380 Direct Access Devices at a 1.5 Mb/sec data rate using the speed matching
buffer is not supported for the 4381 Processor. The maximum
channel-to-control-unit cable length is 122 meters (400 feet).
SIOF Instruction For System/370 Mode
The fast release function of the SIOF instruction and queuing of SIOF instructions
that are issued to a busy block multiplexer channel or control unit are designed to
reduce the time required to start
1/0
operations. These two facilities are always
active. However, the queuing facility must be specified for those control units for
which it is to be effective.
SIOF instruction fast release and queuing can be done only for control units
attached to block multiplexer channels (not for control units attached to byte
multiplexer channels). SIOF queuing is done only for devices that have a
nonshared subchannel assigned (not for shared subchannels). An SIOF instruction
that is issued to a byte multiplexer channel or to a block multiplexer channel
operating in selector mode is executed as an SIO instruction.
Up to eight control units per channel can be configured for queuing. When a
control unit is configured for SIOF queuing, the range of device addresses for
which queuing is to be active must be specified. To ensure the correct operation of
SIOF queuing, the entire range of addresses that the control unit can recognize as
plugged by the customer engineer (for example 8, 16, or 32 for 3830 Model 2
Storage Control or a 3380 storage director) must be specified, even if fewer than
the maximum number of
1/0
devices are actually attached to the control unit. For
the 3850 Mass Storage System, possible real and virtual address ranges must be
specified for each control unit. This address specification requirement permits the
SIOF queuing facility to handle all control unit end conditions (which can be
presented using any device address that is associated with a control unit).
When a string of direct access devices can be switched between two control unit
functions, two device address ranges (one for each control unit function) should be
specified as usual. The specification of one device address range for one control
unit that covers the range of addresses available to both control units will cause
performance degradation.
The fast release and queuing functions are performed by channel microcode.
Channel, control unit, and device queues are maintained. Space is allocated in
auxiliary storage to support the queuing function.
Processing of an SIOF instruction for which fast release and queuing can be done is
handled as follows by channel microcode. The status of the channel specified is
determined.
If
the channel is busy, the status of the required subchannel is
determined.
If
the subchannel is already in use or already queued, a condition code
2 (busy) is presented for the SIOF instruction and the request is not queued.
If
the
subchannel is available when the channel is busy, the request is placed at the end of
the channel queue and a condition code of 0 (request accepted) is generated. The
instruction processing function then resumes processing.
Section 20: 4381 Processor Uniprocessor Model Groups
57
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