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The 4381 Model Group 14 or 3 can be initialized by the operator to operate as a
uniprocessor. The 4381 Model Group 14 or 3 can also be set to operate as a
uniprocessor during system operation by the Alternate CPU Recovery (ACR)
facility of MVS or VM/370 after one instruction processing function becomes
nonfunctional.
When ACR receives control it attempts to transfer work from the failing
instruction processor to the operational instruction processor and tries to recover
the tasks that were operational at the time of the failure. The channels of the
failing instruction processor are reset to handle any outstanding 1/0 and reserve
requests. An attempt is made to restart the operational
1/0
requests using
channels in the group for the operational instruction processor. The failing
instruction processor and its channel group are varied offline. No more 1/0
requests or tasks will be allocated to these components.
If
the primary console is
attached to channel 0 of the failing instruction processor, the primary console
function is switched to an alternate console attached to channel 0 of the operative
instruction processor if such a console is available.
30: 10 Instruction Processing Function
General Description
Each of the two instruction processing functions in a 4381 Model Group 14 or 3
contains all the elements necessary to decode and execute the instructions in the
instruction set for 4381 Processors.
1/0
instructions are partially processed by the
instruction processing function and partially processed by channel hardware.
Extensive parity checking is done within the instruction processing function to
ensure data validity.
All instruction execution functions and most channel operations are microcode
controlled. Microinstructions are four bytes in length. Reloadable control storage
for the residence of instruction processing function microcode is standard in each
instruction processing function.
Certain basic control and service functions are provided for 4381 Processors by the
support processor, a component of the support processor subsystem, instead of by
the instruction processing function. The support processor is a microcoded
controller with its own control storage. The support processor also handles
1/0
operations for the operator console device and up to three other display consoles
and/or printer devices that are directly attached to a 4381 Processor. In addition,
the support processor controls diagnostic facilities (see discussions in Sections
30: 15 and 60: 15).
The two instruction processing functions in the 43 81 Model Group 14 have a
56-nanosecond cycle time (68 nanoseconds for a Model Group 3) and are
functionally identical. They are addressed as 0 and 1 and functionally like the
instruction processing function in the 4381 Model Group 13, as described in
Section 20: 10 under "General Description," but have additional facilities to
support tightly coupled multiprocessing. The Model Group 3 instruction processing
functions are like the Model Group 2 instruction processing function.
Section 30: 4381 Processor Multiprocessor Model Groups
63
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