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Board Level Hardware Description
1
Address Range
$FFF00000 - $FFF3FFFF
$FFF40000 - $FFF400FF
$FFF40100 - $FFF401FF
$FFF40200 - $FFF40FFF
$FFF41000 - $FFF41FFF
$FFF42000 - $FFF42FFF
$FFF43000 - $FFF430FF
$FFF43100 - $FFF431FF
$FFF43200 - $FFF43FFF
$FFF44000 - $FFF44FFF
$FFF45000 - $FFF45800
$FFF45801 - $FFF45FFF
$FFF46000 - $FFF46FFF
$FFF47000 - $FFF47FFF
$FFF48000 - $FFF57FFF
$FFF58000 - $FFF5807F
$FFF58080 - $FFF580FF
$FFF58100 - $FFF5817F
$FFF58180 - $FFF581FF
1-28
The following table focuses on the ''Local I/O Devices'' portion of the
local bus main memory map.
Note
The IPIC chip on the MVME162LX supports up to four
IndustryPack (IP) interfaces, designated IP_a through IP_d.
The MVME162LX itself accommodates two IPs: IP_a and
IP_b. In the following map, the segments applicable to IP_c
and IP_d are not used in the controller.
Table 1-5. Local I/O Devices Memory Map
Devices Accessed
Reserved
VMEchip2 (LCSR)
VMEchip2 (GCSR)
Reserved
Reserved
MCchip
MCECC #1
MCECC #2
MCECCs (repeated)
Reserved
SCC #1 (Z85230)
SCC #2 (Z85230)
LAN (82596CA)
SCSI (53C710)
Reserved
IPIC IP_a I/O
IPIC IP_a ID
IPIC IP_b I/O
IPIC IP_b ID Read
Port
Size
Width
- -
256 KB
D32
256 B
D32-D8
256 B
- -
3.5 KB
- -
4 KB
D32-D8
4 KB
D8
256 B
D8
256 B
- -
3.5 KB
- -
8 KB
D8
2 KB
D8
2 KB
D32
4 KB
D32-D8
4 KB
- -
64 KB
D16
128 B
D16
128 B
D16
128 B
D16
128 B
Computer Group Literature Center Web Site
Notes
4
1, 3
1, 3
4, 5
4
1
1, 9
1, 9
1, 5, 9
4
1, 2
1, 2
1, 6
1
4
1
1
1
1
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