Instantiating The In-System Sources And Probes Intel Fpga Ip - Intel Stratix 10 User Manual

E-tile transceiver phy
Hide thumbs Also See for Stratix 10:
Table of Contents

Advertisement

B. PMA Direct PAM4 30 Gbps to 57.8 Gbps Implementation
UG-20056 | 2019.02.04
Figure 111. PMA Interface Options for PMA Direct High Data Rate PAM4
The PMA direct high data rate PAM4 transceiver configuration rule must select the
64 TX/RX PMA interface width.
B.5. Instantiating the In-system Sources and Probes Intel FPGA IP
This procedure describes how to instantiate the In-System Sources and Probes Intel
FPGA IP core. This IP is used as a reset signal in Making the Top Level Connection.
1. Type
Send Feedback
in the IP Catalog search field.
In system source
®
®
Intel
Stratix
10 E-Tile Transceiver PHY User Guide
223

Advertisement

Table of Contents
loading

Table of Contents