Prbs Usage Model - Intel Stratix 10 User Manual

8. Dynamic Reconfiguration Examples
UG-20056 | 2019.02.04
f. Read 0x8A[7]. It should be 1.
g. Read 0x8B[0] until it changes to 0.
h. Write 0x8A[7] to 1'b1 to clear the 0x8A[7] value.
Related Information
• PMA Register Map
• PMA Attribute Codes

8.2. PRBS Usage Model

The PRBS usage model is comprised of the PRBS pattern generator and verifier
configuration and the hard PRBS error counter configuration. You can use PMA Direct
Mode to implement PRBS (10G/25G) channels.
Different PRBS patterns can be configured using the 0x84, 0x85, 0x86, and 0x87
AVMM addresses. The 0x84 and 0x85 AVMM addresses point to the PRBS pattern
code. The 0x86 and 0x87 AVMM addresses point to the PMA code address 0x02.
Figure 88. Setting PMA Attributes for PRBS Through AVMM Registers
Request issue
to PMA:
enable or
disable
0x90
7
Table 56. PRBS Control PMA Attribute Code Definition, PMA Attribute Code 0x02, PRBS
Enable
Address
0x84[2:0]
Send Feedback
on page 165
on page 170
Status of
Status of
request
request
made to
made to
PMA code
PMA[7]
PMA[0]
address
0x8B 0x8A
0x87
0x00
0 7 0 7 0 7 0 7
7 6 5 4 3 2
PMA code
value
0x86 0x85 0x84
0x02 0x01 0x25
0
7 6 5
Stop on Reserved Auto seed
error correct
1 0
Load RX Load TX
PRBSGEN PRBSGEN
Direction
input
®
Intel Stratix
4 3 2 1
Reseed
Reserved
on Error
PRBS Pattern [2:0]
3'b000 = PRBS7
3'b001 = PRBS9
3'b010 = PRBS11
3'b011 = PRBS15
3'b100 = PRBS23
3'b101 = PRBS31
3'b110 = PRBS13
3'b111 = User
Definition
3'b000: prbs7
3'b001: prbs9
3'b010: prbs11
3'b011: prbs15
3'b100: prbs23
3'b101: prbs31
3'b110: prbs13
continued...
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10 E-Tile Transceiver PHY User Guide
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