Embedded Reconfiguration Streamer - Intel Stratix 10 User Manual

7. Dynamic Reconfiguration
UG-20056 | 2019.02.04
Table 52. Mapping of SystemVerilog Configuration File Line
Bit Position
[34:16] The AVMM address.
[15:8] The AVMM bit mask. The bit mask exposes the bits that are configured in either the Transceiver Native PHY
IP cores.
[7:0] Feature bit values.
For example, a value of 35'h002310400 represents an address of 0x00231 and a bit
mask of 0x04. There is a feature located on bit 2 named
hssi_aibcr_tx_aib_dllstr_align_dy_ctlsel
aib_dllstr_al
similarly to the SystemVerilog package file. Multiple transceiver features may reside at
the same address. Also, a single transceiver feature may span across multiple
addresses.
You can generate multiple configurations (up to eight) of the transceiver Native PHY IP
core. You can select any configuration as the default power-up configuration.

7.6.2. Embedded Reconfiguration Streamer

You can optionally enable the embedded reconfiguration streamer in the Native PHY IP
cores to automate the reconfiguration operation. The embedded reconfiguration
streamer is a feature block that can perform Avalon-MM transactions to access
channel configuration registers in the transceiver. When you enable the embedded
streamer, the Native PHY IP cores embed HDL code for reconfiguration profile storage
and reconfiguration control logic in the IP files.
If the new profile requires changing PMA attributes that can only be performed when
the PMA is disabled, you need to do the following:
1. Assert digital reset.
2. Disable the PMA using PMA attribute code 0x0001.
3. Write to AVMM register 0x40140 with the following bit pattern:
• Bits[5:0] equal to the new profile
• Bit[7] equal to 1 to launch the reconfiguration streamer
The reconfiguration streaming automatically requests PMA recalibration.
4. Continuously read register 0x40141[0]. It asserts high while loading the new
profile and goes low after the new profile has finished loading.
5. Deassert digital reset.
If the new profile does not require the PMA to be disabled, you need to do the
following:
1. Write to AVMM register 0x40140 with the following bit pattern:
• Bits[5:0] equal to the new profile
• Bit[7] equal to 1 to launch the reconfiguration streamer
2. Continue to read register 0x40141[0] until it becomes 0 to indicate that the
reconfiguration streamer is finished.
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Description
, which has the value of 0. The MIF file and C header file are set up
, and it is set to
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Intel Stratix 10 E-Tile Transceiver PHY User Guide
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