Intel Stratix 10 User Manual page 162

Figure 97. Adaptation Working Flow
In the above flow, the transceiver reset is required only for non-Hard PRBS designs,
meaning that the data is coming to the transceiver tile from the FPGA core.
Refer to Loading a PMA Configuration for more details.
Related Information
• PMA Adaptation
• PMA Bring Up Flow
• PMA Analog Reset
® ®
Intel Stratix 10 E-Tile Transceiver PHY User Guide
162
Timeout
PMA Analog
Reset
To Load a Different
PMA Configuration
on page 37
on page 69
on page 104
8. Dynamic Reconfiguration Examples
UG-20056 | 2019.02.04
Transceiver
Power-up
Load PMA
Configuration
Check PMA
Configuration
Status
Start Initial or
Continuous
Adaptation
for chnl[i]
Check for Initial or
Continuous
Adaptation Status
for chnl[i]
N
N=number of chnls?
Y
Transceiver
in Required
Configuration
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