Demo Design Description; Figure 6 Smartfusion2 Security Evaluation Kit Demo Design Files Top-Level Structure; Figure 7 Adaptive Fir Filter Demo Block Diagram - Microsemi SmartFusion2 Demo Manual

SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo
Figure 6 • SmartFusion2 Security Evaluation Kit Demo Design Files Top-Level Structure
2.4.1

Demo Design Description

This demo design uses the following blocks:
• MSS block
• Control logic (user RTL)
• LMS_FIR_TOP (Smart Design)
• TPSRAM (IPcore)
• CoreFFT (IPcore)
Figure 7 • Adaptive FIR Filter Demo Block Diagram
Cortex-M3 Processor
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<download_folder>
SF2_Eval_Adaptive_FIR_filter_Demo_DF
SmartFusion2
AHB Bus Matrix
FIC
APB Interface
Input Data Buffer
Output Data Buffer
FFT Output Real Data Buffer
FFT Output Imaginary Data Buffer
DG0441 Demo Guide Revision 7.0
DesignFiles
GUI
Programming files
Readme.txt
APB
MMUART
LMS _ FIR _TOP
LMS _ ALGO
Core FIR
LMS_CONTROL_FSM
MSS
Core FFT
Fabric
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