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UG0451 User Guide SmartFusion2 and IGLOO2 Programming...
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Within the USA: +1 (800) 713-4113 with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in this...
Programming, page 41. • Information about I/O sates was updated. For more information, see State of SmartFusion2 and IGLOO2 Components During Programming, page 42. • Changed the document to the new template. Revision 4.0 Updated introduction of Auto Programming chapter (SAR 67871).
Programming Interface, page 7. SmartFusion2 and IGLOO2 devices support programming via an external master as well as self- programming. An external master such as a microprocessor or a programmer accesses either the system controller's dedicated JTAG or SPI port (SC_SPI) to program the device.
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Programming Overview Table 1 • SmartFusion2 and IGLOO2 Programming Modes (Except M2S/M2GL050 Device) Description/ JTAG/ Programming SPI-Slave Auto Production Mode Programming Programming Auto Update MSS ISP 2 Step IAP Programming Bitstream Any bitstream Any bitstream Bitstream Any bitstream Any bitstream...
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Programming Overview Table 1 • SmartFusion2 and IGLOO2 Programming Modes (Except M2S/M2GL050 Device) Description/ JTAG/ Programming SPI-Slave Auto Production Mode Programming Programming Auto Update MSS ISP 2 Step IAP Programming SPI directory Not applicable You must You must Not applicable...
Programming Overview Table 2 • M2S/M2GL050 Programming Modes Description/ Programming JTAG/SPI-Slave Auto Production Mode Programming Programming MSS ISP 2 Step IAP Programming Definition An external System controller Cortex-M3 in the Cortex-M3 or user A standalone programmer or programs a blank MSS fetches the logic programs the programmer or test...
Production support for SVF is not available. Contact technical support, if you need to use the SVF format. Programming Interface SmartFusion2 and IGLOO2 devices support the programming interfaces listed in the following table. However, some interfaces are not available in all the device packages. The SC_SPI port is used for auto programming.
(FlashPro) separately. When the design is ready for production, the programming bitstream can be exported using the Libero SoC software. Note: FlashPro cannot be invoked from within the Libero SoC software for SmartFusion2 and IGLOO2 devices. The programming bitstream contains the following components, which can be selected during bitstream generation: •...
The following table lists the bitstream size. Size does not change with device utilization. For information about devices offering with and without transceivers and data security (T, TS, S), see the SmartFusion2 Product Brief IGLOO2 Product Brief. UG0451 User Guide Revision 7.0...
Programming Overview Note: Table 5 • Programming Bitstream Size (All Variations T/S/TS) Full Fabric + Full eNVM + Full Fabric Full eNVM Full Fabric + Full Custom Security (in Device File Type (in KB) (in KB) eNVM (in KB) M2S005/M2GL005 STAPL 1409 M2S010/M2GL010...
Checks if the security settings of the device matches with that of the programming bitstream. If yes, the bitstream is authenticated. The following operations occur while the SmartFusion2 and IGLOO2 programming bitstream is processed: a. Erases all the features selected (fabric, fabric configuration, and security) to be programmed.
(such as FlashPro4/5) or a microprocessor is used to program the device. The devices can be programmed in both single and chain modes. SmartFusion2 and IGLOO2 devices have JTAG pins in a dedicated bank. The location of the bank varies depending on the package. For more...
In critical applications, an upset in the JTAG circuit could lead to an undesired JTAG state. In such cases, Microsemi recommends tying off TRSTB to GND through a resistor placed close to the FPGA pin. Available only in SmartFusion2.
The TDO pin of the JTAG header represents the beginning of the chain and the TDI pin of the last device is connected back to the JTAG header. While programming any Microsemi device in the chain, the Libero SoC (or standalone FlashPro) software puts non-Microsemi devices in the chain into bypass mode. Once a device is in bypass mode, its data register length becomes one and does not react to any programming instructions given by the programmer.
Normal device operation as well as the specification for the JTAG signals SmartFusion2 and IGLOO2 FPGAs require a single programming voltage to be applied at the VPP pin during programming. This voltage must be supplied from the board. Under normal operating conditions, VPP and VPPNVM must be connected to their respective supply range.
VDDIOx pin of the device and the VJTAG pin of the programmer header. In Libero SoC 11.8 SP3 and later versions, FlashPro will not detect VPP if the board contains only RTG4/SmartFusion2/IGLOO2 devices. Leave VPUMP pin of the JTAG header floating if the board has only RTG4/SmartFusion2/IGLOO2 devices.
JTAG Programming Programming Using an External Microprocessor Programming using an on-board microprocessor can be accomplished by the following: • The microprocessor's GPIO driving the JTAG or system controller's SPI port • An algorithm written in C code known as DirectC DirectC supports programming the FPGA fabric, eNVM, and security settings individually or at the same time.
SPI Slave Programming SPI Slave Programming In the SPI slave programming mode, an external SPI master programs the SmartFusion2 or IGLOO2 devices. The SPI master can be an external microprocessor or a programmer such as FlashPro5. The SPI master interfaces with the system controller through a dedicated SC_SPI port, which is in SPI slave mode by default.
SPI Slave Programming Figure 8 • SPI Slave Programming by External Microprocessor VDDIOy y = Bank number where the pin is located 3.3 V 10 K 10 K External Microprocessor SmartFusion2/IGLOO2 (SPI Master) (SPI Slave) FLASH_GOLDEN_N SC_SPI_SS 10 K SC_SPI_CLK SCLK DEVRST_N...
Auto Programming Auto Programming In auto programming mode, SmartFusion2 and IGLOO2 devices program themselves by downloading the bitstream from an external SPI flash device. The system controller configures the MSS or HPMS SPI_0 port for the SPI master mode when the dedicated FLASH_GOLDEN_N pin is asserted low upon system reboot.
The system controller reads the SPI flash device ID and device density to determine the read algorithm, and then programs the device with the bitstream. In auto programming, SmartFusion2 and IGLOO2 devices are blank, and hence SPI signal polarity is mode 3 (SPO=SPH=1).
Auto Programming Figure 11 • Timing Relationship of Reset and FLASH_GOLDEN_N Pin Power_on_Reset_N FLASH_GOLDEN Pin Programming Starts T1 = SPI activity start time = 800 μs 5.1.2 Auto Programming of M2S/M2GL050 Device Auto programming in M2S/M2GL050 devices is performed slightly different than the other devices. The system controller's dedicated SPI port (SC_SPI) is used in auto programming of 050 devices, as shown in the following figure.
The target board must provide power to the VPP, VPPNVM, VDD, and VDDIOx (where x = communication port bank number) pins. For the recommended voltage ranges and pin locations, see the SmartFusion2 and IGLOO2 Datasheet and the corresponding package pin assignment table. For information about the I/O states during MSS ISP programming, see...
MSS ISP (SmartFusion2 Only) Figure 13 • MSS ISP Update Process System Board SmartFusion2 System Cortex-M3 COMM_BLK Port Controller Processor Peripherals Fabric eNVM The application firmware must be written based on the ISP commands shown in the following table. The Libero SoC software provides the ISP system services driver that allows reprogramming the device using the MSS_SYS_start_isp() function.
MSS ISP (SmartFusion2 Only) The following tables describe the ISP response and the corresponding programming service status codes. Table 12 • ISP Responses Offset Length (bytes) Field Description CMD=21 Command STATUS Command status, see the following table Table 13 • ISP Programming Service Status Codes Status Description...
MSS ISP (SmartFusion2 Only) The following figure illustrates the flow of the MSS ISP update. Figure 14 • MSS ISP Update Flow Start Cortex-M3 calls ISP system service call “Authenticate” to authenticate the bitstream Check if bitstream is corrupted; Pass? regenerate if necessary Cortex-M3 calls ISP system service call “Program”...
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MSS ISP (SmartFusion2 Only) Programming Using UART Interface Demo Guide or SmartFusion2 SoC FPGA - In-System Programming Using USB OTG Controller Interface Demo Guide. The system controller runs verification as part of programming operation. However, verification can be executed as a standalone operation to verify the contents of the SmartFusion2 device against the bitstream.
Note: The system controller cannot write to the external SPI flash. IGLOO2: The first step can be accomplished in one of these two ways for IGLOO2 devices: • The user application programs the bitstream into the external SPI flash attached to the HPMS SPI_0 port using an external programmer such as FTDI.
SmartFusion2 and IGLOO2 Datasheet and the corresponding package pin assignment table. For information about the I/O states during IAP programming, see State of SmartFusion2 and IGLOO2 Components During Programming, page 42. The service call has three modes: authenticate, program, and verify.
In-Application Programming 7.1.3 Program The device is automatically placed in the F*F state before programming commences and the F*F entry message is transmitted. If the programming operation is successful, the device goes through a power- on-reset sequence generated by the system controller. However, the user application must execute another system reset in addition to system controller reset as soon as the IAP system service is completed, otherwise the LSRAM block might be inaccessible.
In-Application Programming The following tables list the IAP command options. For more information about these commands, see the SmartFusion2 MSS System Services Driver User Guide, which can be downloaded from the Libero SoC firmware catalog. Table 14 • IAP Service Requests Offset Length (bytes) Field...
Monitor the related power supplies that Unstable voltage level. cause the issue during programming; check for transients violating Microsemi specifications. For more information about transient specifications, see DS0128: IGLOO2 and SmartFusion2 Datasheet. Device security prevented...
Verify mode fabric digest check bits set (Optional) For IGLOO2 device, either external programmer or user logic in the fabric loads the bitstream into the external SPI flash in the SPI_0 port. For IGLOO2 device, user logic calls IAP system service.
The design version of the update image must be greater than the image version already programmed in the device. When auto update is enabled, SmartFusion2/IGLOO2 MSS/HPMS SPI_0 can be configured to share the SPI_0 pin with an SPI controller implemented in the FPGA fabric. To share the SPI_0 port, a multiplexer needs to be implemented in the FPGA fabric to switch the SPI_0 pins between MSS/HPMS SPI_0 and the fabric SPI controller.
For the recommended voltage ranges and pin locations, see the SmartFusion2 and IGLOO2 Datasheet and the corresponding package pin assignment table. For information about the I/O states during auto update, see State of SmartFusion2 and IGLOO2 Components During Programming, page 42. Configuring the Device for Auto Update There are two ways to configure the FPGA for auto update: •...
SmartFusion2 and IGLOO2 devices need to be programmed with programming recovery settings in Libero SoC to enable programming recovery during manufacturing flow, as shown in the following figure.
These settings are provided as an illustration, actual setting is done through the Libero SoC GUI. For information about the I/O states during programming recovery, see State of SmartFusion2 and IGLOO2 Components During Programming, page 42. Table 21 • Programming Recovery Configuration Settings (UCNFG[16:12])
Programming Recovery SPI Flash Configuration and Image Selection The image needs to be written to the external SPI flash connected to SPI_0. The SPI directory contains the addresses of the programming bitstreams stored in the SPI flash. Libero SoC creates the SPI directory (<file_name>.spidir) as part of the bitstream based on user preference.
Do nothing Do nothing The following figure shows the programming recovery configuration for the SmartFusion2 device as described in previous sections. The same settings are applicable for IGLOO2 devices. Figure 21 • Programming Recovery Configuration for SmartFusion2 User Data Update Image...
Sculptor 3. The SmartFusion2 or IGLOO2 device is inserted in an FPGA package specific adapter module, which is then plugged into Silicon Sculptor 3. Microsemi provides Silicon Sculptor 3 software or Sculptw that is used to run the programmer. For more information, see the following web page: http://www.microsemi.com/products/fpga-soc/design-...
State of SmartFusion2 and IGLOO2 Components During Programming State of SmartFusion2 and IGLOO2 Components During Programming The following table lists the state of each ASIC block and I/O during the programming modes described in this user guide. You can configure the I/O state during JTAG programing in Libero SoC, see Figure 22, page 44.
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State of SmartFusion2 and IGLOO2 Components During Programming Table 26 • ASIC Block and I/O State During Programming (continued) Programming Method Component JTAG/SPI Slave IAP/MSS ISP Auto Programming SPI_0 Same as above Same as above for MSS ISP. Slave select pins (SS4, SS5,...
State of SmartFusion2 and IGLOO2 Components During Programming The following table lists the state of each ASIC block and each I/O during programming recovery. Table 27 • ASIC Block and I/O State During Programming Recovery/Auto Update Components Programming Recovery/Auto Update Cortex-M3 processor Held in reset.
State of SmartFusion2 and IGLOO2 Components During Programming 11.1 Use of Flash Freeze Mechanism in Device Programming The SPI slave, IAP, and MSS ISP (SmartFusion2 only) programming modes involve the device being put into F*F mode. In this mode, the I/Os are disabled and the fabric is powered down. However, the I/O state can be set using the I/O Editor of the Libero SoC software, as shown in the following figure.
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