Microsemi SmartFusion2 Demo Manual
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Microsemi SmartFusion2 Demo Manual

Microsemi SmartFusion2 Demo Manual

Soc fpga adaptive fir filter - libero soc v11.8 sp1
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Download this manual See also: Configuration Manual, Demo Manual
DG0441
Demo Guide
SmartFusion2 SoC FPGA Adaptive FIR Filter - Libero
SoC v11.8 SP1

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Summary of Contents for Microsemi SmartFusion2

  • Page 1 DG0441 Demo Guide SmartFusion2 SoC FPGA Adaptive FIR Filter - Libero SoC v11.8 SP1...
  • Page 2 Within the USA: +1 (800) 713-4113 with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in this...

  • Page 3: Table Of Contents

    Setting Up the Demo Design for SmartFusion2 Starter Kit ....... .
  • Page 4 USB to UART Bridge Drivers for SmartFusion2 Starter Kit .......
  • Page 5 SmartFusion2 Security Evaluation Kit Jumper Settings........10...

  • Page 6: Revision History

    Revision History Revision History The revision history describes the changes that were implemented in the document. The changes are listed by revision, starting with the current publication. Revision 7.0 In revision 7.0, the document is updated for Libero v11.8 SP1 software release. Revision 6.0 Updated the document for Libero v11.7 software release.

  • Page 7: Smartfusion2 Soc Fpga - Adaptive Fir Filter Demo

    The SmartFusion 2 SoC FPGA devices integrate a fourth generation flash-based FPGA fabric and an ARM Cortex-M3 processor. The SmartFusion2 SoC FPGA fabric includes embedded mathblocks, which are optimized specifically for digital signal processing (DSP) applications such as, finite impulse response (FIR) filters, infinite impulse response (IIR) filters, and fast fourier transform (FFT) functions.

  • Page 8: Figure 2 Linear Prediction Adaptive Filter Architecture

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo signal. The algorithm iterates over each coefficient in the filter, moving it in the direction of the approximated gradient. After reaching the optimal filter coefficients, the error signal e(n) consists of the wideband signal.

  • Page 9: Figure 3 Input Spectrum Of Narrow Band Signal + Wide Band Signal

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo e(n)= d(n)- y(n) EQ 1 where, e(n) is the error signal d(n) is desired signal The filter weights/coefficients are updated using the following equation: h(n+1)=h(n)+µ*e(n)*x(n-) EQ 2 where, h(n+1) indicates the estimated filter weights h(n) is present filter weights µ...

  • Page 10: Design Requirements

    • GUI executable • Readme file The following figure shows the top-level structure of the SmartFusion2 Starter kit design files. For further details, refer to the readme.txt file. Figure 5 • SmartFusion2 Starter Kit Demo Design Files Top-Level Structure <download_folder>...

  • Page 11: Demo Design Description

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo Figure 6 • SmartFusion2 Security Evaluation Kit Demo Design Files Top-Level Structure <download_folder> SF2_Eval_Adaptive_FIR_filter_Demo_DF DesignFiles Programming files Readme.txt 2.4.1 Demo Design Description This demo design uses the following blocks: • MSS block •...
  • Page 12 SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo 2.4.1.1 MSS Block The MSS block sends and receives the data between the Host PC (GUI interface) and FPGA fabric logic. The MMUART interface is used to communicate with the Host PC. FIC_0 interface (advanced peripheral bus (APB) master) is used to communicate with the fabric user logic.

  • Page 13: Setting Up The Demo Design For Smartfusion2 Starter Kit

    1-3 Open, 2-4 Close Use the mini-USB port as the power source. Connect the FlashPro4 programmer to the P5 connector of the SmartFusion2 Starter kit board. Connect the Host PC USB port to the P1 Mini USB connector on the SmartFusion2 Starter kit board using the USB Mini-B cable.

  • Page 14: Figure 9 Usb To Uart Bridge Drivers For Smartfusion2 Starter Kit

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo Figure 9 • USB to UART Bridge Drivers for SmartFusion2 Starter Kit If USB to UART bridge drivers are not installed, download and install the drivers from www.microsemi.com/soc/documents/CDM_2.08.24_WHQL_Certified.zip DG0441 Demo Guide Revision 7.0...

  • Page 15: Setting Up The Demo Design For Smartfusion2 Security Evaluation Kit

    Connect the FlashPro4 programmer to the J5 connector of the SmartFusion2 Security Evaluation kit board. Connect the Host PC USB port to the P1 Mini USB connector on the SmartFusion2 Security Evaluation kit board using the USB Mini-B cable. The following figure shows the board setup for running the DSP Adaptive FIR filter demo on the SmartFusion2 Security Evaluation kit.

  • Page 16: Figure 10 Smartfusion2 Security Evaluation Kit Setup

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo Figure 10 • SmartFusion2 Security Evaluation Kit Setup Switch ON the SW7 power supply switch. Ensure that the USB to UART bridge drivers are automatically detected. This can be verified in the Device Manager of the Host PC.

  • Page 17: Programming The Demo Design

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo Figure 11 • USB to UART Bridge Drivers for SmartFusion2 Security Evaluation Kit If USB to UART bridge drivers are not installed, download and install the drivers from www.microsemi.com/soc/documents/CDM_2.08.24_WHQL_Certified.zip. Programming the Demo Design...

  • Page 18: Setting Up The Device

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo Figure 12 • FlashPro - New Project Click Browse and navigate to the location where you want to save the project. Select Single device as the Programming mode. Click OK to save the project.

  • Page 19: Programming The Device

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo 2.6.2 Programming the Device Figure 13 • FlashPro Project Configuration Click PROGRAM to start programming the device. Wait until programmer status is changed to RUN PASSED as shown in the following figure.

  • Page 20: Adaptive Fir Filter Demo Gui

    The Adaptive FIR filter demo is provided with a user-friendly GUI that runs on the Host PC and communicates with the SmartFusion2 Starter kit. The UART is used as the underlying communication protocol between the Host PC and SmartFusion2 Starter kit or SmartFusion2 Security Evaluation kit.

  • Page 21: Running The Design

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo Figure 15 • Adaptive FIR Filter Demo GUI The Adaptive FIR filter demo window consists of the following tabs: • Input Parameters: Configures the serial COM port, filter generation, and signal generation.

  • Page 22: Figure 16 Serial Port Configuration

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo The Adaptive FIR filter Demo window is displayed, refer to the following figure. Figure 16 • Serial Port Configuration Serial Port Configuration: The COM port number is automatically detected and baud rate is fixed at 115200.

  • Page 23: Figure 18 Signal Generation

    Wideband), FFT spectrum. Refer to the following figure. Figure 18 • Signal Generation Click Start to load the input data (1K samples) to the SmartFusion2 device for processing the filtering operation, refer to the following figure. Figure 19 • Adaptive FIR Filter Demo - Start After completing the filter operation, the GUI receives the error data and its FFT data from the Smart- Fusion2 device and plots as shown in the following figure.

  • Page 24: Figure 20 Error Signal: Time And Frequency Plot

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo Figure 20 • Error Signal: Time and Frequency Plot The narrowband signal component is suppressed gradually in the Error signal frequency spectrum. This can be observed in the Error signal FFT plot as shown in the following figure.

  • Page 25: Figure 22 Compare Error Signal: Time And Frequency Plot

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo Figure 22 • Compare Error Signal: Time and Frequency Plot A window displaying the comparison between the input wide band and output wide band is dis- played, refer to the following figure.

  • Page 26: Figure 24 Input Wide Band Vs Output Wide Band

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo The plot can be zoomed in for comparison, refer to the following figure. Figure 24 • Input Wide Band vs Output Wide Band Compare the Error signal (Output wide band signal) with the input wide band signal, refer to the following figure.

  • Page 27: Figure 27 Error Signal - Gui Options

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo Page setup, print, show point values, Zoom, and set scale to default are other options for signal analysis. Figure 27 • Error Signal - GUI Options 10. The input signal and error signal values can be viewed in the Text Viewer tab. Click the Text Viewer tab and then click the corresponding View shown in the following figure.

  • Page 28: Figure 29 Text Viewer: Input Signal Values

    SmartFusion2 SoC FPGA - Adaptive FIR Filter Demo The following figure shows the Text Viewer tab showing the Input Signal values. Figure 29 • Text Viewer: Input Signal Values 11. To save the Input Signal as a text file, right-click the Input Signal window. The Input Signal window displays different options as shown in the following figure.

  • Page 29: Conclusion

    Figure 31 • Exit Demo Conclusion This demo provides information about the features of the SmartFusion2 device including mathblocks and how to use Microsemi IPs (CoreFIR and CoreFFT) or narrow band interference cancellation application using adaptive filters. This Adaptive FIR filter based-demo is easy to use and provides several options to understand and implement digital signal processing (DSP) filters on the SmartFusion2 device.

  • Page 30: Appendix: Smartdesign Implementation

    Appendix: SmartDesign Implementation Appendix: SmartDesign Implementation Adaptive FIR filter SmartDesign is shown in the following figure. Figure 32 • Adaptive FIR Filter SmartDesign SmartDesign LMS_FIR_TOP is shown in the following figure. Figure 33 • LMS_FIR_TOP Smart Design DG0441 Demo Guide Revision 7.0...

  • Page 31: Table 4 Adaptive Fir Filter Demo Smart Design Blocks And Description

    Adaptive_FIR FIR_FILTER_0 is a System Builder generated component, in which MMUART is configured to handle the communication between the host PC and fabric logic. To generate a System Builder component, refer to the SmartFusion2 System Builder User Guide. DATAHANDLE_FSM Control logic to send/receive the data between MSS and data buffers...

  • Page 32: Appendix: Resource Usage Summary

    Appendix: Resource Usage Summary Appendix: Resource Usage Summary The following table shows Adaptive FIR filter demo resource usage summary. Device: SmartFusion2 device Die: M2S010 Package: 484 FBGA Table 6 • Adaptive FIR Filter Demo Resource Usage Summary Type Used Total...

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