Serdes Smpte Channels; Serdes Pci Express Channels; Fpga Test Pins - Lattice Semiconductor LatticeECP2M PCI Express x4 User Manual

Lattice Semiconductor
Table 5. SERDES Connectors (see Appendix A, Figure 9)
SMA
J18
J21
J24
J26
J29
J32

SERDES SMPTE Channels

Note: SERDES SMPTE channels are available only for the LFE2M50E-FF672 (or larger) device.
(see Appendix A, Figure 9)
A single-channel 75-ohm SERDES channel is connected to BNC edge connectors. These connections are pro-
vided to connect to SMPTE video equipment. The channels include the appropriate passive components for
interoperability to SMPTE devices.
Table 6. SERDES SMPTE BNC Connectors (see Appendix A, Figure 9)

SERDES PCI Express Channels

(see Appendix A, Figure 9)
This board is equipped to communicate directly as an add-on card to a PCI Express host. It is designed with edge
fingers (CN1) to fit directly into an x4 host receptacle. Power can be supplied directly from the PCI Express host via
the edge finger connections.

FPGA Test Pins

(see Appendix A, Figure 14)
General-purpose FPGA pins are available for user applications. FPGA pins are connected to switches and LEDS
designated according to the following table.
Table 7. FPGA Test Pins (see Appendix A, Figure 11)
Switch
SW6D
SW6C
SW6B
SW6A
SW5D
SW5C
SW5B
SW5A
Channel Name
L_HDINP0
L_HDINN0
L_HDINP1
L_HDINN1
L_HDINP2
L_HDINN2
BNC Channel Name
J20
J23
J28
J31
BGA Netname
T30 Switch1
T4 Switch2
P8 Switch3
R6 Switch4
T1 Switch5
U1 Switch6
R7 Switch7
T5 Switch8
10
LatticeECP2M PCI Express x4
Evaluation Board User's Guide
SMA Channel Name
J19 L_HDOUTP0
J22 L_HDOUTN0
J25 L_HDOUTP1
J27 L_HDOUTN1
J30 L_HDOUTP2
J33 L_HDOUTN2
L_HDINP3
L_HDINN3
L_HDOUTP3
L_HDOUTN3
LED BGA
D16 U3
D17 U4
D19 U5
D21 U6
D15 U2
D18 V1
D20 W2
D22 V2
NetName
RED1
YELLOW1
GREEN1
BLUE1
RED2
YELLOW2
GREEN2
BLUE2