Interrupts; Overview - Rabbit 6000 User Manual

6. I
NTERRUPTS

6.1 Overview

The Rabbit 6000 can operate at one of four priority levels, 0–3, with Priority 0 being the expected standard
operating level. The current priority and up to three previous priority levels are kept in the processor's 8-
bit IP register, where bits 0–1 contain the current priority. Every time an interrupt is handled or an IPSET
instruction occurs, the value in the register is shifted left by two bits, and the new priority placed in bits 0–
1. When an IPRES or IRET instruction occurs, the value in IP is shifted right by two bits (bits 0–1 are
shifted into bits 6–7). On reset, the processor starts at Priority 3.
Most interrupts can be set to be Priority 1–3. A pending interrupt will be handled only if its interrupt prior-
ity is greater than the current processor priority. This means that even a Priority 3 interrupt can be blocked
if the processor is currently at Priority 3. The System Mode Violation, Stack Limit Violation, Write Protec-
tion Violation, secondary watchdog, and breakpoint interrupts are always enabled at Priority 3. In addition,
when the System/User Mode is enabled and the processor is in the User Mode, the processor will not actu-
ally enter Priority 3; any attempt to enter Priority 3 will actually be requested as Priority 2.
When an interrupt is handled, a call is executed to a fixed location in the interrupt vector tables. This oper-
ation requires 11 clocks, the minimum interrupt latency for the Rabbit 6000. There are two vector tables,
the internal and the external interrupt vector tables, that can be located anywhere in logical memory by set-
ting the processor's IIR and EIR registers. The IIR and EIR registers hold the upper byte of each table's
address. For example, if IIR is loaded with 0xC4, then the internal interrupt vector table will start at the
logical memory address 0xC400.
Both the internal and external interrupt vector table occupy 512 bytes. Since the RST and SYSCALL vec-
tors use all eight bits of the IIR for addressing, the lowermost bit of IIR should always be set to zero so to
keep some vectors from inadvertently overlapping.
Each interrupt's vector begins on a 16-byte boundary inside the vector tables. It may be possible to fit a
small routine into that space, but it is typical to place a call to a separate routine in that location.
Some Rabbit 6000 instructions are "chained atomic," which means that an interrupt cannot occur between
that instruction and the following instruction. These instructions are useful for doing things like exiting
interrupt handlers properly or updating semaphores.
digi.com
Rabbit 6000 User's Manual 83