Register Descriptions - Rabbit 6000 User Manual

18.4 Register Descriptions

Timer C Control/Status Register
Bit(s) Value
7:2
1 0
(Read-
1
only)
0 0
1
Timer C Control Register
Bit(s) Value
7:4
3:2 00
01
10
11
1:0 00
01
10
11
Timer C Divider Low Register
Bit(s) Value
7:0
Timer C Divider High Register
Bit(s) Value
7:0
Rabbit 6000 User's Manual
These bits are always read as zero.
Timer C divider has not reached its maximum value.
Timer C divider has reached its maximum value. This status bit is cleared
by the read of this register, as is the Timer C interrupt.
The clock input for Timer C is disabled.
The clock input for Timer C is enabled.
These bits are reserved and should be written with zero.
Timer C clocked by main Timer C clock (i.e. CLK/2).
Timer C clocked by the output of Timer A1.
Timer C clocked by main Timer C clock divided by 8 (i.e. CLK/16).
Timer C clocked by the output of Timer A11.
Timer C interrupts are disabled.
Timer C interrupt use Interrupt Priority 1.
Timer C interrupt use Interrupt Priority 2.
Timer C interrupt use Interrupt Priority 3.
The eight LSBs of the divider limit value for Timer C are stored.
The eight MSBs of the divider limit value for Timer C are stored.
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(TCCSR) (Address = 0x0500)
Description
(TCCR) (Address = 0x0501)
Description
(TCDLR) (Address = 0x0502)
Description
(TCDHR) (Address = 0x0503)
Description
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