2.2 Dependencies
2.2.1 I/O Pins
The main, Wi-Fi, Ethernet, and USB clocks contain a bypassable internal oscillator, so either a crystal or an
external clock input can be used. The selection of a crystal or an external signal for the main oscillator is
determined by the state of the CFG pins on startup, and by the Master System Status Register (MSSR). The
Ethernet clock source (main clock or PHY oscillator) is selected in the Master System Configuration Reg-
ister (MSCR). Table 2-1 lists the pins assigned to each clock and how they are controlled.
Clock
Main Clock
W-Fi Clock
Ethernet Clock
USB Clock
32 kHz Clock
The 32 kHz clock input is on the CLK_32K pin. There is an internal Schmitt trigger on this pin to reduce
sensitivity to noise.
The peripheral clock or peripheral clock divided by 2 may be optionally output on the CLK pin by
enabling it via bits 7–6 in GOCR.
Rabbit 6000 User's Manual
Table 2-1. Clock Pin Assignments
Frequency
Crystal Pins
24 –42 MHz
(crystal)
CLK_HSI
20–200 MHz
CLK_HSO
(external
clock)
XTL_20MI
20 MHz
XTL_20MO
XTL_25MI
25 MHz
XTL_25MO
XTL_48MI
48 MHz
XTL_48MO
32 kHz
—
digi.com
External Clock
Crystal/External
Signal Pins
Clock Selection by
CLK_HSO
(see chapter 3)
XTL_20MO
XTL_25MO
XTL_48MO
CLK_32K
CFG pins
MSSR
—
MSSR
—
18
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